Re: MIPS checksum bug

[Ralf Baechle <ralf@linux-mips.org>]

On Fri, Sep 19, 2008 at 05:09:17PM +0100, Maciej W. Rozycki wrote:

> > @@ -229,6 +239,9 @@ LEAF(csum_partial)
> >  
> >  	/* Still a full word to go  */
> >  	ulw	t1, (src)
> > +#ifdef USE_DOUBLE
> > +	add	t1, zero	/* clear upper 32bit */
> > +#endif
> >  	PTR_ADDIU	src, 4
> >  	ADDC(sum, t1)
> >  
> 
>  Unfortunately you can't zero-extend with a single instruction (you can
> use a single sll(v) to sign-extend), unless the R2 ISA provides some
> suitable oddity (which I haven't checked).  You want something like:
> 
> 	dsll32	t1, t1, 0
> 	dsrl32	t1, t1, 0
> 
> instead.

For a one's complement checksum it doesn't matter in which of the 4
halfwords the data ends is loaded.  So the easiest solution is:

	/* Still a full word to go  */
	ulw     t1, (src)
#ifdef USE_DOUBLE
	dsll	t1, t1, 32		/* clear lower 32bit */
#endif
	PTR_ADDIU       src, 4
	ADDC(sum, t1)

  Ralf