[PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[David Daney]

This is an incomplete proof of concept that I applied to be able to
build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit case
or the R4000_WAR case.

Comments welcome.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 arch/mips/include/asm/compiler.h |    7 +++++++
 arch/mips/include/asm/delay.h    |    4 ++++
 2 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h
index 71f5c5c..1f0954d 100644
--- a/arch/mips/include/asm/compiler.h
+++ b/arch/mips/include/asm/compiler.h
@@ -16,4 +16,11 @@
 #define GCC_REG_ACCUM "accum"
 #endif
 
+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)
+#define GCC_NO_H_CONSTRAINT
+#ifdef CONFIG_64BIT
+typedef unsigned int uint128_t __attribute__((mode(TI)));
+#endif
+#endif
+
 #endif /* _ASM_COMPILER_H */
diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h
index b0bccd2..3e467e8 100644
--- a/arch/mips/include/asm/delay.h
+++ b/arch/mips/include/asm/delay.h
@@ -83,10 +83,14 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
 		: "r" (usecs), "r" (lpj)
 		: GCC_REG_ACCUM);
 	else if (sizeof(long) == 8 && !R4000_WAR)
+#ifdef GCC_NO_H_CONSTRAINT
+		usecs = ((uint128_t)usecs * lpj) >> 64;
+#else
 		__asm__("dmultu\t%2, %3"
 		: "=h" (usecs), "=l" (lo)
 		: "r" (usecs), "r" (lpj)
 		: GCC_REG_ACCUM);
+#endif
 	else if (sizeof(long) == 8 && R4000_WAR)
 		__asm__("dmultu\t%3, %4\n\tmfhi\t%0"
 		: "=r" (usecs), "=h" (hi), "=l" (lo)
-- 
1.5.6.5

Re: [PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[Maciej W. Rozycki]

On Wed, 17 Dec 2008, David Daney wrote:

> This is an incomplete proof of concept that I applied to be able to
> build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit case
> or the R4000_WAR case.

 The R4000_WAR case can use the same C code -- GCC will adjust code 
generated as necessary according to the -mfix-r4000 flag.  For the 32-bit 
case I think the conclusion was the only way to get it working is to use 
MFHI explicitly in the asm.

  Maciej

Re: [PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[Richard Sandiford]

"Maciej W. Rozycki" <macro@linux-mips.org> writes:
> On Wed, 17 Dec 2008, David Daney wrote:
>
>> This is an incomplete proof of concept that I applied to be able to
>> build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit case
>> or the R4000_WAR case.
>
>  The R4000_WAR case can use the same C code -- GCC will adjust code 
> generated as necessary according to the -mfix-r4000 flag.  For the 32-bit 
> case I think the conclusion was the only way to get it working is to use 
> MFHI explicitly in the asm.

No, the same sort of cast, multiply and shift should work for 32-bit
code too.  I.e.:

		usecs = ((uint64_t)usecs * lpj) >> 32;

It should work for both -mfix-r4000 and -mno-fix-r4000.

Richard

[PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[David Daney]

Due to the removal of the 'h' asm constraint in GCC-4.4, we need to
adjust the computation in delay.h

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---

Tested on 64-bit kernel (Cavium Octeon).

 arch/mips/include/asm/compiler.h |    7 +++++++
 arch/mips/include/asm/delay.h    |   10 +++++++++-
 2 files changed, 16 insertions(+), 1 deletions(-)

diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h
index 71f5c5c..1f0954d 100644
--- a/arch/mips/include/asm/compiler.h
+++ b/arch/mips/include/asm/compiler.h
@@ -16,4 +16,11 @@
 #define GCC_REG_ACCUM "accum"
 #endif
 
+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)
+#define GCC_NO_H_CONSTRAINT
+#ifdef CONFIG_64BIT
+typedef unsigned int uint128_t __attribute__((mode(TI)));
+#endif
+#endif
+
 #endif /* _ASM_COMPILER_H */
diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h
index b0bccd2..9be0ba7 100644
--- a/arch/mips/include/asm/delay.h
+++ b/arch/mips/include/asm/delay.h
@@ -62,8 +62,9 @@ static inline void __delay(unsigned long loops)
 
 static inline void __udelay(unsigned long usecs, unsigned long lpj)
 {
+#ifndef GCC_NO_H_CONSTRAINT
 	unsigned long hi, lo;
-
+#endif
 	/*
 	 * The rates of 128 is rounded wrongly by the catchall case
 	 * for 64-bit.  Excessive precission?  Probably ...
@@ -77,6 +78,12 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
 	                           0x80000000ULL) >> 32);
 #endif
 
+#ifdef GCC_NO_H_CONSTRAINT
+	if (sizeof(long) == 4)
+		usecs = ((u64)usecs * lpj) >> 32;
+	else
+		usecs = ((uint128_t)usecs * lpj) >> 64;
+#else
 	if (sizeof(long) == 4)
 		__asm__("multu\t%2, %3"
 		: "=h" (usecs), "=l" (lo)
@@ -92,6 +99,7 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
 		: "=r" (usecs), "=h" (hi), "=l" (lo)
 		: "r" (usecs), "r" (lpj)
 		: GCC_REG_ACCUM);
+#endif
 
 	__delay(usecs);
 }
-- 
1.5.6.6

Re: [PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[Maciej W. Rozycki]

On Tue, 24 Feb 2009, David Daney wrote:

> @@ -16,4 +16,11 @@
>  #define GCC_REG_ACCUM "accum"
>  #endif
>  
> +#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)
> +#define GCC_NO_H_CONSTRAINT
> +#ifdef CONFIG_64BIT
> +typedef unsigned int uint128_t __attribute__((mode(TI)));
> +#endif
> +#endif
> +
>  #endif /* _ASM_COMPILER_H */

 I suggest to call it u128 in line with all the other such types (and 
place it in <asm/types.h>?).  Also it might be more reasonable to call the 
macro something like GCC_HAS_EXT64_MULT or suchlike as in my opinion we 
should prefer using C code for a calculation like this even if the "h" 
constraint still worked.  We might want to have i128 too. :)

> @@ -62,8 +62,9 @@ static inline void __delay(unsigned long loops)
>  
>  static inline void __udelay(unsigned long usecs, unsigned long lpj)
>  {
> +#ifndef GCC_NO_H_CONSTRAINT
>  	unsigned long hi, lo;
> -
> +#endif
>  	/*
>  	 * The rates of 128 is rounded wrongly by the catchall case
>  	 * for 64-bit.  Excessive precission?  Probably ...
> @@ -77,6 +78,12 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
>  	                           0x80000000ULL) >> 32);
>  #endif
>  
> +#ifdef GCC_NO_H_CONSTRAINT
> +	if (sizeof(long) == 4)
> +		usecs = ((u64)usecs * lpj) >> 32;
> +	else
> +		usecs = ((uint128_t)usecs * lpj) >> 64;
> +#else
>  	if (sizeof(long) == 4)
>  		__asm__("multu\t%2, %3"
>  		: "=h" (usecs), "=l" (lo)
> @@ -92,6 +99,7 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
>  		: "=r" (usecs), "=h" (hi), "=l" (lo)
>  		: "r" (usecs), "r" (lpj)
>  		: GCC_REG_ACCUM);
> +#endif
>  
>  	__delay(usecs);
>  }

 Ouch, this is horribly ugly.  It begs for making the conditional chunks a 
pair of separate static inline functions.  You could then do something 
like __delay(__usecs_to_loops(usecs, lpj)) and simply have two variants of 
__usecs_to_loops() with no need to chop code with #ifdefs in the middle.

  Maciej

Re: [PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[Ralf Baechle]

On Tue, Feb 24, 2009 at 03:04:22PM -0800, David Daney wrote:

> Due to the removal of the 'h' asm constraint in GCC-4.4, we need to
> adjust the computation in delay.h

It's time to take a step back and think over the whole thing once more.

Inlining __udelay can be problematic on some processors where the
execution performance of the delay loop will be different if the loop is
crossing a cacheline or not.  That seems to particularly hit R10000
systems often.  The number of the loop interations does the wrong tradeoff
between accuracy and the value range needed.  The resulting overflows on a
HZ=128 4000 BogoMIPS machine are fantastic :-)

Time to reimplement udelay I'd say.

  Ralf

Re: [PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[Florian Fainelli]

Le Saturday 27 December 2008 16:19:40 Richard Sandiford, vous avez écrit :
> "Maciej W. Rozycki" <macro@linux-mips.org> writes:
> > On Wed, 17 Dec 2008, David Daney wrote:
> >> This is an incomplete proof of concept that I applied to be able to
> >> build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit case
> >> or the R4000_WAR case.
> >
> >  The R4000_WAR case can use the same C code -- GCC will adjust code
> > generated as necessary according to the -mfix-r4000 flag.  For the 32-bit
> > case I think the conclusion was the only way to get it working is to use
> > MFHI explicitly in the asm.
>
> No, the same sort of cast, multiply and shift should work for 32-bit
> code too.  I.e.:
>
> 		usecs = ((uint64_t)usecs * lpj) >> 32;
>
> It should work for both -mfix-r4000 and -mno-fix-r4000.

Any updates on this ?
-- 
Best regards, Florian Fainelli
Email : florian@openwrt.org
http://openwrt.org
-------------------------------

Re: [PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[Wu Zhangjin]

Hi, 

On Thu, 2009-05-28 at 13:31 +0200, Florian Fainelli wrote:
> Le Saturday 27 December 2008 16:19:40 Richard Sandiford, vous avez écrit :
> > "Maciej W. Rozycki" <macro@linux-mips.org> writes:
> > > On Wed, 17 Dec 2008, David Daney wrote:
> > >> This is an incomplete proof of concept that I applied to be able to
> > >> build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit case
> > >> or the R4000_WAR case.
> > >
> > >  The R4000_WAR case can use the same C code -- GCC will adjust code
> > > generated as necessary according to the -mfix-r4000 flag.  For the 32-bit
> > > case I think the conclusion was the only way to get it working is to use
> > > MFHI explicitly in the asm.
> >
> > No, the same sort of cast, multiply and shift should work for 32-bit
> > code too.  I.e.:
> >
> > 		usecs = ((uint64_t)usecs * lpj) >> 32;
> >
> > It should work for both -mfix-r4000 and -mno-fix-r4000.
> 
> Any updates on this ?

I have updated it to this PATCH, could you help to review it?



[loongson-PATCH-v2 20/23] add gcc
4.4 support for MIPS and loongson

thx!
Wu Zhangjin

Re: [PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[David Daney]

Wu Zhangjin wrote:
> Hi, 
> 
> On Thu, 2009-05-28 at 13:31 +0200, Florian Fainelli wrote:
>> Le Saturday 27 December 2008 16:19:40 Richard Sandiford, vous avez écrit :
>>> "Maciej W. Rozycki" <macro@linux-mips.org> writes:
>>>> On Wed, 17 Dec 2008, David Daney wrote:
>>>>> This is an incomplete proof of concept that I applied to be able to
>>>>> build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit case
>>>>> or the R4000_WAR case.
>>>>  The R4000_WAR case can use the same C code -- GCC will adjust code
>>>> generated as necessary according to the -mfix-r4000 flag.  For the 32-bit
>>>> case I think the conclusion was the only way to get it working is to use
>>>> MFHI explicitly in the asm.
>>> No, the same sort of cast, multiply and shift should work for 32-bit
>>> code too.  I.e.:
>>>
>>> 		usecs = ((uint64_t)usecs * lpj) >> 32;
>>>
>>> It should work for both -mfix-r4000 and -mno-fix-r4000.
>> Any updates on this ?
> 
> I have updated it to this PATCH, could you help to review it?
> 
> 
> 

FWIW, Ralf also has a patch, that I have tested, that takes a slightly 
different approach.

In any event, it would be nice if one of the patches were merged to 
2.6.30 before it is released.  GCC-4.4 has been available for quite a 
while now.  Not being able to build the kernel with it will become a 
larger issue as time goes by.

David Daney

Re: [PATCH] MIPS: Handle removal of 'h' constraint in GCC 4.4

[Florian Fainelli]

Le Thursday 28 May 2009 17:43:18 David Daney, vous avez écrit :
> Wu Zhangjin wrote:
> > Hi,
> >
> > On Thu, 2009-05-28 at 13:31 +0200, Florian Fainelli wrote:
> >> Le Saturday 27 December 2008 16:19:40 Richard Sandiford, vous avez 
écrit :
> >>> "Maciej W. Rozycki" <macro@linux-mips.org> writes:
> >>>> On Wed, 17 Dec 2008, David Daney wrote:
> >>>>> This is an incomplete proof of concept that I applied to be able to
> >>>>> build a 64 bit kernel with GCC-4.4.  It doesn't handle the 32 bit
> >>>>> case or the R4000_WAR case.
> >>>>
> >>>>  The R4000_WAR case can use the same C code -- GCC will adjust code
> >>>> generated as necessary according to the -mfix-r4000 flag.  For the
> >>>> 32-bit case I think the conclusion was the only way to get it working
> >>>> is to use MFHI explicitly in the asm.
> >>>
> >>> No, the same sort of cast, multiply and shift should work for 32-bit
> >>> code too.  I.e.:
> >>>
> >>> 		usecs = ((uint64_t)usecs * lpj) >> 32;
> >>>
> >>> It should work for both -mfix-r4000 and -mno-fix-r4000.
> >>
> >> Any updates on this ?
> >
> > I have updated it to this PATCH, could you help to review it?
>
> FWIW, Ralf also has a patch, that I have tested, that takes a slightly
> different approach.

Are you refering to this one: "MIPS: Rewrite <asm/div64.h> to work with gcc 
4.4.0." ? If so, it does not solve the problem for 32-bits kernels.

>
> In any event, it would be nice if one of the patches were merged to
> 2.6.30 before it is released.  GCC-4.4 has been available for quite a
> while now.  Not being able to build the kernel with it will become a
> larger issue as time goes by.

Definitively.
-- 
Best regards, Florian Fainelli
Email : florian@openwrt.org
http://openwrt.org
-------------------------------