From: Raghu Gandham <raghu@mips.com>
To: linux-mips@linux-mips.org
Cc: raghu@mips.com, chris@mips.com
Subject: [PATCH 1/3] Fix accesses to device registers on MIPS boards
Date: Fri, 10 Jul 2009 01:53:54 -0700 [thread overview]
Message-ID: <20090710085354.25918.5090.stgit@linux-raghu> (raw)
In-Reply-To: <20090710085338.25918.37597.stgit@linux-raghu>
From: Chris Dearman <chris@mips.com>
This fixes the remaining problems introduced by
f197465384bf7ef1af184c2ed1a4e268911a91e3 (incorrect access length &
byteswapping in bigendian mode)
Signed-off-by: Chris Dearman (chris@mips.com)
---
arch/mips/mti-malta/malta-int.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 3e0a9b3..e568d0d 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -87,7 +87,7 @@ static inline int mips_pcibios_iack(void)
dummy = BONITO_PCIMAP_CFG;
iob(); /* sync */
- irq = readl((u32 *)_pcictrl_bonito_pcicfg);
+ irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg);
iob(); /* sync */
irq &= 0xff;
BONITO_PCIMAP_CFG = 0;
next prev parent reply other threads:[~2009-07-10 8:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-07-10 8:53 [PATCH 0/3] Port malta interrupt changes (GIC, GCMP) from linux-mti Raghu Gandham
2009-07-10 8:53 ` Raghu Gandham [this message]
2009-07-10 8:54 ` [PATCH 2/3] Port of GIC related changes from MTI branch Raghu Gandham
2009-07-10 8:54 ` [PATCH 3/3] Avoid accessing GCMP registers when they are not present Raghu Gandham
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