From: Raghu Gandham <raghu@mips.com>
To: linux-mips@linux-mips.org
Cc: raghu@mips.com, chris@mips.com
Subject: [PATCH 1/2] [MTI] Enable PIIX4 PCI2.1 compliancy on Malta
Date: Fri, 10 Jul 2009 01:58:15 -0700 [thread overview]
Message-ID: <20090710085815.26049.39237.stgit@linux-raghu> (raw)
In-Reply-To: <20090710085759.26049.52144.stgit@linux-raghu>
From: Chris Dearman <chris@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
---
arch/mips/mti-malta/malta-setup.c | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c
index dc78b89..69f5f9c 100644
--- a/arch/mips/mti-malta/malta-setup.c
+++ b/arch/mips/mti-malta/malta-setup.c
@@ -223,3 +223,14 @@ void __init plat_mem_setup(void)
board_be_init = malta_be_init;
board_be_handler = malta_be_handler;
}
+/* Enable PCI 2.1 compatibility in PIIX4 */
+static void __init quirk_dlcsetup(struct pci_dev *dev)
+{
+ u8 odlc, ndlc;
+ (void) pci_read_config_byte(dev, 0x82, &odlc);
+ /* Enable passive releases and delayed transaction */
+ ndlc = odlc | 7;
+ (void) pci_write_config_byte(dev, 0x82, ndlc);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
+ quirk_dlcsetup);
next prev parent reply other threads:[~2009-07-10 8:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-07-10 8:57 [PATCH 0/2] Port Malta setup patches from linux-mti Raghu Gandham
2009-07-10 8:58 ` Raghu Gandham [this message]
2009-07-10 8:58 ` [PATCH 2/2] Added coherentio command line option for DMA_NONCOHERENT kernel Raghu Gandham
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