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From: Ralf Baechle <ralf@linux-mips.org>
To: "Gandham, Raghu" <raghu@mips.com>
Cc: "Kevin D. Kissell" <kevink@paralogos.com>,
	linux-mips@linux-mips.org, "Dearman, Chris" <chris@mips.com>
Subject: Re: [PATCH 15/15] Do not rely on the initial state of TC/VPEbindings when doing cross VPE writes
Date: Mon, 12 Oct 2009 22:25:14 +0200	[thread overview]
Message-ID: <20091012202514.GB28561@linux-mips.org> (raw)
In-Reply-To: <94BD67F8AF3ED34FA362C662BA1F12C50439A11F@MTVEXCHANGE.mips.com>

On Mon, Oct 12, 2009 at 01:20:49PM -0700, Gandham, Raghu wrote:

> > -----Original Message-----
> > From: Ralf Baechle [mailto:ralf@linux-mips.org] 
> > Sent: Monday, October 12, 2009 9:18 AM
> > To: Gandham, Raghu
> > Cc: Kevin D. Kissell; linux-mips@linux-mips.org; Dearman, Chris
> > Subject: Re: [PATCH 15/15] Do not rely on the initial state 
> > of TC/VPEbindings when doing cross VPE writes
> > 
> > On Thu, Jul 02, 2009 at 02:46:33PM -0700, Gandham, Raghu wrote:
> > 
> > > > From: Kevin D. Kissell [mailto:kevink@paralogos.com]
> > > > Sent: Wednesday, July 01, 2009 9:02 PM
> > > > To: Gandham, Raghu
> > > > Cc: linux-mips@linux-mips.org; Dearman, Chris
> > > > Subject: Re: [PATCH 15/15] Do not rely on the initial state of 
> > > > TC/VPE bindings when doing cross VPE writes
> > > > 
> > > > Note that, regardless of the reset state, smtc_configure_tlb() 
> > > > should have at least temporarily bound TC 1 to VPE1, which may be 
> > > > why this never seemed to be a problem on the 34K.  If one 
> > wants to 
> > > > support designs with more than 2 VPEs, then this is 
> > probably one of 
> > > > the things that needs to be fixed.  That having been said, rather 
> > > > than adding a usually-redundant write_vpe_c0_vpeconf0() in that 
> > > > clause, wouldn't it
> > > be
> > > > cleaner to just move the MVP setting from the top of the 
> > loop to the 
> > > > point in the loop just after the TCs have been bound to 
> > the VPE in 
> > > > question, i.e.,
> > > > 
> > > >  454                 if (slop) {
> > > >  455                         if (tc != 0) {
> > > >  456                                 smtc_tc_setup(vpe,tc, cpu);
> > > >  457                                 cpu++;
> > > >  458                         }
> > > >  459                         printk(" %d", tc);
> > > >  460                         tc++;
> > > >  461                         slop--;
> > > >  462                 }
> > > > 
> > > >                         
> > write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() 
> > > > | VPECONF0_MVP);
> > > > 
> > > >  463                 if (vpe != 0) {
> > > >  464                         /*
> > > >  465                          * Clear any stale software 
> > interrupts
> > > from
> > > > VPE's Cause
> > > >  466                          */
> > > > 
> > > > This should definitely be OK for a 34K, because it's 
> > being executed 
> > > > by TC0 in VPE0 and the reset state of VPE0 has MVP set.  If it 
> > > > weren't,
> > > > smtc_configure_tlb() would have failed.
> > > > 
> > > >           Regards,
> > > > 
> > > >           Kevin K.
> > > 
> > > 
> > > I will resend this patch with your suggestion.
> > 
> > Ping?  Don't think I ever received that, if you sent it.
> I resent the patch and it got checked-in. It is not appended to this
> mail thread though. 
> http://www.linux-mips.org/git?p=linux.git;a=commitdiff;h=d8e5f9fe5dab0e0
> 7985f2456cb6cc57788f53131

Ah, ok.  Thanks!

  Ralf

  parent reply	other threads:[~2009-10-12 20:24 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-07-02  2:39 [PATCH 00/15] Port changes from linux-mti Raghu Gandham
2009-07-02  2:39 ` [PATCH 01/15] Due to some broken bitfiles, we can't trust IntCtl Raghu Gandham
2009-07-02  2:40 ` [PATCH 02/15] Fix absd emulation Raghu Gandham
2009-07-02  2:40 ` [PATCH 03/15] [MTI] Clean up SPRAM support a little Raghu Gandham
2009-07-02  2:40 ` [PATCH 04/15] Fix accesses to device registers on MIPS boards Raghu Gandham
2009-07-02  2:40 ` [PATCH 05/15] [MTI] MIPS secondary cache supports 64 byte line size Raghu Gandham
2009-07-02  2:41 ` [PATCH 06/15] [MTI] Enable PIIX4 PCI2.1 compliancy on Malta Raghu Gandham
2009-07-02  2:41 ` [PATCH 07/15] APRP Patch04: Propagate final value of max_low_pfn to max_pfn Raghu Gandham
2009-07-02  2:41 ` [PATCH 08/15] Fix compiler warning in vpe.c Raghu Gandham
2009-07-02  2:41 ` [PATCH 09/15] Add debug prints during CPU intialization Raghu Gandham
2009-07-02  2:42 ` [PATCH 10/15] Port of GIC related changes from MTI branch Raghu Gandham
2009-07-02  2:42 ` [PATCH 11/15] Add missing memory barriers for correct operation of amon_cpu_start Raghu Gandham
2009-07-02  2:42 ` [PATCH 12/15] Added coherentio command line option for DMA_NONCOHERENT kernel Raghu Gandham
2009-07-02  2:43 ` [PATCH 13/15] Avoid accessing GCMP registers when they are not present Raghu Gandham
2009-07-02  2:43 ` [PATCH 14/15] Avoid queing multiple reschedule IPI's in SMTC Raghu Gandham
2009-07-02  2:43 ` [PATCH 15/15] Do not rely on the initial state of TC/VPE bindings when doing cross VPE writes Raghu Gandham
2009-07-02  4:02   ` Kevin D. Kissell
2009-07-02 21:46     ` Gandham, Raghu
2009-07-02 21:46       ` Gandham, Raghu
2009-07-02 22:08       ` Kevin D. Kissell
2009-10-12 16:17       ` Ralf Baechle
2009-10-12 20:20         ` [PATCH 15/15] Do not rely on the initial state of TC/VPEbindings " Gandham, Raghu
2009-10-12 20:20           ` Gandham, Raghu
2009-10-12 20:25           ` Ralf Baechle [this message]
2009-07-10  8:47 ` [PATCH 00/15] Port changes from linux-mti Gandham, Raghu
2009-07-10  8:47   ` Gandham, Raghu

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