From: Ralf Baechle <ralf@linux-mips.org>
To: Chih-hung Lu <winfred.lu@gmail.com>
Cc: Wu Zhangjin <wuzhangjin@gmail.com>,
Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support
Date: Sun, 1 Nov 2009 08:43:17 +0100 [thread overview]
Message-ID: <20091101074317.GD4551@linux-mips.org> (raw)
In-Reply-To: <a2dc26810910291916x1556eb21uecaa8bdeeb98baae@mail.gmail.com>
On Fri, Oct 30, 2009 at 10:16:14AM +0800, Chih-hung Lu wrote:
> May I ask a question,
> what is the difference between "addu a0, 4" and "addiu a0, a0, 4"?
That's because you are human - you're smart enough to notice the difference
without even thinking about it :)
The machine instructions addu and addiu differ. Addiu takes an immediate
constant as it's last op. Addu takes a register instead. Now the assembler
is trying to make things a little easier to us. Depending on the type of
the last argument it will assemble an "addu" assembler instruction either
into an addiu or addu.
The other difference between the two instructions used in your example is
that the first has two operands, the other three operands. If there is
only two operands, the assembler will implicitly assume, that the 2nd
register is the same as the first register.
Or in other words, the code generated from both will be entirely identical.
Ralf
prev parent reply other threads:[~2009-11-01 7:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-10-29 6:20 [PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support Wu Zhangjin
2009-10-29 16:17 ` David Daney
2009-10-30 2:16 ` Chih-hung Lu
2009-10-30 2:16 ` Chih-hung Lu
2009-10-30 2:53 ` Wu Zhangjin
2009-11-01 7:43 ` Ralf Baechle [this message]
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