[PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support

[PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support

[Wu Zhangjin]

From: Wu Zhangjin <wuzhangjin@gmail.com>

This patch indents the instructions in the delay slot of the file which
has a ".set noreorder" added.

and also, the "addu a0, 4" instruction is replaced by "addiu a0, a0, 4".

(This is against the commit
c6adcc73663a71f2aa9e66796a9bd57fcb6a349a(MIPS: add support for
gzip/bzip2/lzma compressed kernel images) in the mips-for-linux-next
branch of Ralf's
http://www.linux-mips.org/git?p=upstream-sfr.git;a=summary

This -v1 revision incorporates the feedback from "Maciej W. Rozycki"
<macro@linux-mips.org>)

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/boot/compressed/head.S |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S
index e23f25e..6d069cd 100644
--- a/arch/mips/boot/compressed/head.S
+++ b/arch/mips/boot/compressed/head.S
@@ -30,7 +30,7 @@ start:
 	PTR_LA	a2, _end
 1:	sw	zero, 0(a0)
 	bne	a2, a0, 1b
-	addu	a0, 4
+	 addiu	a0, a0, 4
 
 	PTR_LA	a0, (.heap)          /* heap address */
 	PTR_LA  sp, (.stack + 8192)  /* stack address */
@@ -38,7 +38,7 @@ start:
 	PTR_LA	ra, 2f
 	PTR_LA	k0, decompress_kernel
 	jr	k0
-	nop
+	 nop
 2:
 	move	a0, s0
 	move	a1, s1
@@ -46,10 +46,12 @@ start:
 	move	a3, s3
 	PTR_LI	k0, KERNEL_ENTRY
 	jr	k0
-	nop
+	 nop
 3:
 	b 3b
+	 nop
 	END(start)
 
 	.comm .heap,BOOT_HEAP_SIZE,4
 	.comm .stack,4096*2,4
+	.set reorder
-- 
1.6.2.1

Re: [PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support

[David Daney]

Wu Zhangjin wrote:
> From: Wu Zhangjin <wuzhangjin@gmail.com>
> 
[...]
>  	.comm .heap,BOOT_HEAP_SIZE,4
>  	.comm .stack,4096*2,4
> +	.set reorder

I feel a little ambivalent about the '.set reorder'.

Since it is at the end of the file, you could omit it.  If you think you 
will add more things around it, you could put a '.set push' at the top 
and then use '.set pop' here.  Or you could leave it as is.

David Daney

Re: [PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support

[Chih-hung Lu]

2009/10/29 Wu Zhangjin <wuzhangjin@gmail.com>:
> From: Wu Zhangjin <wuzhangjin@gmail.com>
>
> This patch indents the instructions in the delay slot of the file which
> has a ".set noreorder" added.
>
> and also, the "addu a0, 4" instruction is replaced by "addiu a0, a0, 4".
Hi,

May I ask a question,
what is the difference between "addu a0, 4" and "addiu a0, a0, 4"?
They look same to me.
Thank you.

Regards,
Winfred Lu

Re: [PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support

[Chih-hung Lu]

2009/10/29 Wu Zhangjin <wuzhangjin@gmail.com>:
> From: Wu Zhangjin <wuzhangjin@gmail.com>
>
> This patch indents the instructions in the delay slot of the file which
> has a ".set noreorder" added.
>
> and also, the "addu a0, 4" instruction is replaced by "addiu a0, a0, 4".
Hi,

May I ask a question,
what is the difference between "addu a0, 4" and "addiu a0, a0, 4"?
They look same to me.
Thank you.

Regards,
Winfred Lu

Re: [PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support

[Wu Zhangjin]

On Fri, 2009-10-30 at 10:16 +0800, Chih-hung Lu wrote:
> 2009/10/29 Wu Zhangjin <wuzhangjin@gmail.com>:
> > From: Wu Zhangjin <wuzhangjin@gmail.com>
> >
> > This patch indents the instructions in the delay slot of the file which
> > has a ".set noreorder" added.
> >
> > and also, the "addu a0, 4" instruction is replaced by "addiu a0, a0, 4".
> Hi,
> 
> May I ask a question,
> what is the difference between "addu a0, 4" and "addiu a0, a0, 4"?
> They look same to me.

Hello,

Although they function the same under gas("addu a0, 4" will be assembled
to "addiu a0, a0, 4"), but herein is exactly an immediate data
operation, I just keep it be what it is! only a "cleanup" here.

Thanks & Regards,
	Wu Zhangjin

Re: [PATCH -v1] MIPS: a few of fixups and cleanups for the compressed kernel support

[Ralf Baechle]

On Fri, Oct 30, 2009 at 10:16:14AM +0800, Chih-hung Lu wrote:

> May I ask a question,
> what is the difference between "addu a0, 4" and "addiu a0, a0, 4"?

That's because you are human - you're smart enough to notice the difference
without even thinking about it :)

The machine instructions addu and addiu differ.  Addiu takes an immediate
constant as it's last op.  Addu takes a register instead.  Now the assembler
is trying to make things a little easier to us.  Depending on the type of
the last argument it will assemble an "addu" assembler instruction either
into an addiu or addu.

The other difference between the two instructions used in your example is
that the first has two operands, the other three operands.  If there is
only two operands, the assembler will implicitly assume, that the 2nd
register is the same as the first register.

Or in other words, the code generated from both will be entirely identical.

  Ralf