[PATCH v4] MIPS: Add a high resolution sched_clock() via cnt32_to_63().

[PATCH v4] MIPS: Add a high resolution sched_clock() via cnt32_to_63().

[Wu Zhangjin]

From: Wu Zhangjin <wuzhangjin@gmail.com>

(This v4 revision incorporates with the feedbacks from Sergei.)

This patch adds a cnt32_to_63() and MIPS c0 count based sched_clock(),
which provides high resolution. and also, one new kernel option
(HR_SCHED_CLOCK) is added to enable/disable this sched_clock().

Without it, the Ftrace for MIPS will give useless timestamp information.

Because cnt32_to_63() needs to be called at least once per half period
to work properly, Differ from the old version, this v2 revision set up a
kernel timer to ensure the requirement of some MIPSs which have short c0
count period.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/Kconfig           |   18 +++++++++++++
 arch/mips/kernel/csrc-r4k.c |   57 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 75 insertions(+), 0 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b342197..5ea55f5 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1952,6 +1952,24 @@ config NR_CPUS
 source "kernel/time/Kconfig"
 
 #
+# High Resolution sched_clock() Configuration
+#
+
+config HR_SCHED_CLOCK
+	bool "High Resolution sched_clock()"
+	depends on CSRC_R4K
+	default n
+	help
+	  This option enables the MIPS c0 count based high resolution
+	  sched_clock().
+
+	  If you need a ns precision timestamp, you are recommended to enable
+	  this option. For example, If you are using the Ftrace subsystem to do
+	  real time tracing, this option is needed.
+
+	  If unsure, disable it.
+
+#
 # Timer Interrupt Frequency Configuration
 #
 
diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c
index e95a3cd..7762c95 100644
--- a/arch/mips/kernel/csrc-r4k.c
+++ b/arch/mips/kernel/csrc-r4k.c
@@ -10,6 +10,61 @@
 
 #include <asm/time.h>
 
+#ifdef CONFIG_HR_SCHED_CLOCK
+#include <linux/cnt32_to_63.h>
+#include <linux/timer.h>
+
+/*
+ * MIPS sched_clock implementation.
+ *
+ * because cnt32_to_63() needs to be called at least once per half period to
+ * work properly, and some of the MIPS frequency is high, perhaps a kernel
+ * timer is needed to be set up to ensure this requirement is always met.
+ * Please refer to arch/arm/plat-orion/time.c and include/linux/cnt32_to_63.h
+ */
+static unsigned long __read_mostly tclk2ns_scale;
+static unsigned long __read_mostly tclk2ns_scale_factor;
+
+unsigned long long notrace sched_clock(void)
+{
+	unsigned long long v = cnt32_to_63(read_c0_count());
+	return (v * tclk2ns_scale) >> tclk2ns_scale_factor;
+}
+
+static struct timer_list cnt32_to_63_keepwarm_timer;
+
+static void cnt32_to_63_keepwarm(unsigned long data)
+{
+	mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data));
+	(void) sched_clock();
+}
+
+static void __init setup_sched_clock(struct clocksource *cs, unsigned long tclk)
+{
+	unsigned long long v;
+	unsigned long data;
+
+	v = cs->mult;
+	/*
+	 * We want an even value to automatically clear the top bit
+	 * returned by cnt32_to_63() without an additional run time
+	 * instruction. So if the LSB is 1 then round it up.
+	 */
+	if (v & 1)
+		v++;
+	tclk2ns_scale = v;
+	tclk2ns_scale_factor = cs->shift;
+
+	data = 0x80000000 / tclk * HZ;
+	setup_timer(&cnt32_to_63_keepwarm_timer, cnt32_to_63_keepwarm, data);
+	mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data));
+}
+#else	/* !CONFIG_HR_SCHED_CLOCK */
+static void __init setup_sched_clock(struct clocksource *cs, unsigned long tclk)
+{
+}
+#endif
+
 static cycle_t c0_hpt_read(struct clocksource *cs)
 {
 	return read_c0_count();
@@ -32,6 +87,8 @@ int __init init_r4k_clocksource(void)
 
 	clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
 
+	setup_sched_clock(&clocksource_mips, mips_hpt_frequency);
+
 	clocksource_register(&clocksource_mips);
 
 	return 0;
-- 
1.6.2.1

Re: [PATCH v4] MIPS: Add a high resolution sched_clock() via cnt32_to_63().

[Ingo Molnar]

* Wu Zhangjin <wuzhangjin@gmail.com> wrote:

> From: Wu Zhangjin <wuzhangjin@gmail.com>
> 
> (This v4 revision incorporates with the feedbacks from Sergei.)
> 
> This patch adds a cnt32_to_63() and MIPS c0 count based sched_clock(),
> which provides high resolution. and also, one new kernel option
> (HR_SCHED_CLOCK) is added to enable/disable this sched_clock().
> 
> Without it, the Ftrace for MIPS will give useless timestamp information.
> 
> Because cnt32_to_63() needs to be called at least once per half period
> to work properly, Differ from the old version, this v2 revision set up a
> kernel timer to ensure the requirement of some MIPSs which have short c0
> count period.
> 
> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
> ---
>  arch/mips/Kconfig           |   18 +++++++++++++
>  arch/mips/kernel/csrc-r4k.c |   57 +++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 75 insertions(+), 0 deletions(-)

Looks good in general, just a few small nits:

> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index b342197..5ea55f5 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -1952,6 +1952,24 @@ config NR_CPUS
>  source "kernel/time/Kconfig"
>  
>  #
> +# High Resolution sched_clock() Configuration
> +#
> +
> +config HR_SCHED_CLOCK
> +	bool "High Resolution sched_clock()"
> +	depends on CSRC_R4K
> +	default n
> +	help
> +	  This option enables the MIPS c0 count based high resolution
> +	  sched_clock().
> +
> +	  If you need a ns precision timestamp, you are recommended to enable
> +	  this option. For example, If you are using the Ftrace subsystem to do

s/If/if

> +	  real time tracing, this option is needed.
> +
> +	  If unsure, disable it.
> +
> +#
>  # Timer Interrupt Frequency Configuration
>  #
>  
> diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c
> index e95a3cd..7762c95 100644
> --- a/arch/mips/kernel/csrc-r4k.c
> +++ b/arch/mips/kernel/csrc-r4k.c
> @@ -10,6 +10,61 @@
>  
>  #include <asm/time.h>
>  
> +#ifdef CONFIG_HR_SCHED_CLOCK
> +#include <linux/cnt32_to_63.h>
> +#include <linux/timer.h>
> +
> +/*
> + * MIPS sched_clock implementation.
> + *
> + * because cnt32_to_63() needs to be called at least once per half period to
> + * work properly, and some of the MIPS frequency is high, perhaps a kernel
> + * timer is needed to be set up to ensure this requirement is always met.
> + * Please refer to arch/arm/plat-orion/time.c and include/linux/cnt32_to_63.h
> + */
> +static unsigned long __read_mostly tclk2ns_scale;
> +static unsigned long __read_mostly tclk2ns_scale_factor;
> +
> +unsigned long long notrace sched_clock(void)
> +{
> +	unsigned long long v = cnt32_to_63(read_c0_count());
> +	return (v * tclk2ns_scale) >> tclk2ns_scale_factor;
> +}
> +
> +static struct timer_list cnt32_to_63_keepwarm_timer;
> +
> +static void cnt32_to_63_keepwarm(unsigned long data)
> +{
> +	mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data));
> +	(void) sched_clock();

sched_clock() isnt __must_check so the cast of the return value seems 
unnecessary.

> +}
> +
> +static void __init setup_sched_clock(struct clocksource *cs, unsigned long tclk)
> +{
> +	unsigned long long v;
> +	unsigned long data;
> +
> +	v = cs->mult;
> +	/*
> +	 * We want an even value to automatically clear the top bit
> +	 * returned by cnt32_to_63() without an additional run time
> +	 * instruction. So if the LSB is 1 then round it up.
> +	 */
> +	if (v & 1)
> +		v++;
> +	tclk2ns_scale = v;
> +	tclk2ns_scale_factor = cs->shift;
> +
> +	data = 0x80000000 / tclk * HZ;
> +	setup_timer(&cnt32_to_63_keepwarm_timer, cnt32_to_63_keepwarm, data);
> +	mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data));
> +}
> +#else	/* !CONFIG_HR_SCHED_CLOCK */
> +static void __init setup_sched_clock(struct clocksource *cs, unsigned long tclk)
> +{
> +}
> +#endif

Could this be put into a new, separate file, 
arch/mips/kernel/csrc-r4k-hres.c, to avoid the ugly #ifdef block?

> +
>  static cycle_t c0_hpt_read(struct clocksource *cs)
>  {
>  	return read_c0_count();
> @@ -32,6 +87,8 @@ int __init init_r4k_clocksource(void)
>  
>  	clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
>  
> +	setup_sched_clock(&clocksource_mips, mips_hpt_frequency);

And i'd suggest to rename it to setup_hres_sched_clock() - as i presume 
this system has a sched_clock() even if CONFIG_HR_SCHED_CLOCK is 
disabled.

Thanks,

	Ingo