[PATCH 2/2] MIPS: add readl/write_be

[PATCH 2/2] MIPS: add readl/write_be

[Florian Fainelli]

MIPS currently lacks the readl_be and writel_be accessors
which are required by BCM63xx for OHCI and EHCI support.
Let's define them globally for MIPS. This also fixes the
compilation of the bcm63xx defconfig against USB.

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
---
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 436878e..65cb4e4 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -447,6 +447,9 @@ __BUILDIO(q, u64)
 #define readl_relaxed			readl
 #define readq_relaxed			readq
 
+#define readl_be(addr)			__raw_readl((__force unsigned *)addr)
+#define writel_be(val, addr)		__raw_writel(val, (__force unsigned *)addr)
+
 /*
  * Some code tests for these symbols
  */
-- 

Re: [PATCH 2/2] MIPS: add readl/write_be

[Thomas Bogendoerfer]

On Sat, Dec 12, 2009 at 05:57:56PM +0100, Florian Fainelli wrote:
> +#define readl_be(addr)			__raw_readl((__force unsigned *)addr)
> +#define writel_be(val, addr)		__raw_writel(val, (__force unsigned *)addr)

looks broken for little endian machines. __raw_XXX doesn't do any swapping,
so IMHO the correct thing would be to use be32_to_cpu/cpu_to_be32.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

Re: [PATCH 2/2] MIPS: add readl/write_be

[David Daney]

Florian Fainelli wrote:
> MIPS currently lacks the readl_be and writel_be accessors
> which are required by BCM63xx for OHCI and EHCI support.
> Let's define them globally for MIPS. This also fixes the
> compilation of the bcm63xx defconfig against USB.
> 
> Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
> ---
> diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
> index 436878e..65cb4e4 100644
> --- a/arch/mips/include/asm/io.h
> +++ b/arch/mips/include/asm/io.h
> @@ -447,6 +447,9 @@ __BUILDIO(q, u64)
>  #define readl_relaxed			readl
>  #define readq_relaxed			readq
>  
> +#define readl_be(addr)			__raw_readl((__force unsigned *)addr)
> +#define writel_be(val, addr)		__raw_writel(val, (__force unsigned *)addr)
> +


Without addressing the need for the patch, as a technical matter, the 
macro parameters should probably be protected by parenthesis.  I.E.:

#define readl_be(addr)			__raw_readl((__force unsigned *)(addr))
#define writel_be(val, addr)		__raw_writel((val), (__force unsigned 
*)(addr))

Re: [PATCH 2/2] MIPS: add readl/write_be

[Florian Fainelli]

Hello Thomas,

On Saturday 12 December 2009 20:31:14 Thomas Bogendoerfer wrote:
> On Sat, Dec 12, 2009 at 05:57:56PM +0100, Florian Fainelli wrote:
> > +#define readl_be(addr)			__raw_readl((__force unsigned *)addr)
> > +#define writel_be(val, addr)		__raw_writel(val, (__force unsigned
> > *)addr)
> 
> looks broken for little endian machines. __raw_XXX doesn't do any swapping,
> so IMHO the correct thing would be to use be32_to_cpu/cpu_to_be32.

Yeah, I missed that point. Please find below version 2 of the patch which also addresses David's comment.
--
From: Florian Fainelli <ffainelli@freebox.fr>
Subject: [PATCH v2] MIPS: add readl_be/writel_be

MIPS currently lacks the readl_be and writel_be accessors
which are required by BCM63xx for OHCI and EHCI support.
Let's define them globally for MIPS. This also fixes the
compilation of the bcm63xx defconfig against USB.

Changes from v1:
- make it work on little-endian machines
- protect macros arguments with parenthesis

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
---
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 436878e..4a76d39 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -447,6 +447,9 @@ __BUILDIO(q, u64)
 #define readl_relaxed			readl
 #define readq_relaxed			readq
 
+#define readl_be(addr)			cpu_to_be32(__raw_readl((__force unsigned *)(addr)))
+#define writel_be(val, addr)		__raw_writel(be32_to_cpu((val)), (__force unsigned *)(addr))
+
 /*
  * Some code tests for these symbols
  */
-- 

Re: [PATCH 2/2] MIPS: add readl/write_be

[Geert Uytterhoeven]

On Mon, Dec 14, 2009 at 18:02, Florian Fainelli <ffainelli@freebox.fr> wrote:
> On Saturday 12 December 2009 20:31:14 Thomas Bogendoerfer wrote:
>> On Sat, Dec 12, 2009 at 05:57:56PM +0100, Florian Fainelli wrote:
>> > +#define readl_be(addr)                     __raw_readl((__force unsigned *)addr)
>> > +#define writel_be(val, addr)               __raw_writel(val, (__force unsigned
>> > *)addr)
>>
>> looks broken for little endian machines. __raw_XXX doesn't do any swapping,
>> so IMHO the correct thing would be to use be32_to_cpu/cpu_to_be32.
>
> Yeah, I missed that point. Please find below version 2 of the patch which also addresses David's comment.
> --
> From: Florian Fainelli <ffainelli@freebox.fr>
> Subject: [PATCH v2] MIPS: add readl_be/writel_be
>
> MIPS currently lacks the readl_be and writel_be accessors
> which are required by BCM63xx for OHCI and EHCI support.
> Let's define them globally for MIPS. This also fixes the
> compilation of the bcm63xx defconfig against USB.
>
> Changes from v1:
> - make it work on little-endian machines
> - protect macros arguments with parenthesis
>
> Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
> ---
> diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
> index 436878e..4a76d39 100644
> --- a/arch/mips/include/asm/io.h
> +++ b/arch/mips/include/asm/io.h
> @@ -447,6 +447,9 @@ __BUILDIO(q, u64)
>  #define readl_relaxed                  readl
>  #define readq_relaxed                  readq
>
> +#define readl_be(addr)                 cpu_to_be32(__raw_readl((__force unsigned *)(addr)))
> +#define writel_be(val, addr)           __raw_writel(be32_to_cpu((val)), (__force unsigned *)(addr))

Shouldn't it be the other way around (cpu <-> be32), i.e.

#define readl_be(addr)
be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
#define writel_be(val, addr)
__raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))

? I know it'll work both ways, though...

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

Re: [PATCH 2/2] MIPS: add readl/write_be

[Florian Fainelli]

Hi Geert,

Le lundi 14 décembre 2009 20:05:50, Geert Uytterhoeven a écrit :
> On Mon, Dec 14, 2009 at 18:02, Florian Fainelli <ffainelli@freebox.fr> wrote:
> > On Saturday 12 December 2009 20:31:14 Thomas Bogendoerfer wrote:
> >> On Sat, Dec 12, 2009 at 05:57:56PM +0100, Florian Fainelli wrote:
> >> > +#define readl_be(addr)                     __raw_readl((__force
> >> > unsigned *)addr) +#define writel_be(val, addr)              
> >> > __raw_writel(val, (__force unsigned *)addr)
> >>
> >> looks broken for little endian machines. __raw_XXX doesn't do any
> >> swapping, so IMHO the correct thing would be to use
> >> be32_to_cpu/cpu_to_be32.
> >
> > Yeah, I missed that point. Please find below version 2 of the patch which
> > also addresses David's comment. --
> > From: Florian Fainelli <ffainelli@freebox.fr>
> > Subject: [PATCH v2] MIPS: add readl_be/writel_be
> >
> > MIPS currently lacks the readl_be and writel_be accessors
> > which are required by BCM63xx for OHCI and EHCI support.
> > Let's define them globally for MIPS. This also fixes the
> > compilation of the bcm63xx defconfig against USB.
> >
> > Changes from v1:
> > - make it work on little-endian machines
> > - protect macros arguments with parenthesis
> >
> > Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
> > ---
> > diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
> > index 436878e..4a76d39 100644
> > --- a/arch/mips/include/asm/io.h
> > +++ b/arch/mips/include/asm/io.h
> > @@ -447,6 +447,9 @@ __BUILDIO(q, u64)
> >  #define readl_relaxed                  readl
> >  #define readq_relaxed                  readq
> >
> > +#define readl_be(addr)                 cpu_to_be32(__raw_readl((__force
> > unsigned *)(addr))) +#define writel_be(val, addr)          
> > __raw_writel(be32_to_cpu((val)), (__force unsigned *)(addr))
> 
> Shouldn't it be the other way around (cpu <-> be32), i.e.
> 
> #define readl_be(addr)
> be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
> #define writel_be(val, addr)
> __raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))

It should, I inverted the semantics. I should think twice before sending stuff :)
--
From: Florian Fainelli <ffainelli@freebox.fr>
Subject: [PATCH v3] MIPS: add readl/write_be accessors

MIPS currently lacks the readl_be and writel_be accessors
which are required by BCM63xx for OHCI and EHCI support.
Let's define them globally for MIPS. This also fixes the
compilation of the bcm63xx defconfig against USB.

Changes from v2:
- fixed the be/cpu endianness inversion

Changes from v1:
- make it work on little-endian machines
- protect macros arguments with parenthesis

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
---
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 436878e..65d7843 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -447,6 +447,9 @@ __BUILDIO(q, u64)
 #define readl_relaxed			readl
 #define readq_relaxed			readq
 
+#define readl_be(addr)			be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
+#define writel_be(val, addr)		__raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))
+
 /*
  * Some code tests for these symbols
  */
-- 

Re: [PATCH 2/2] MIPS: add readl/write_be

[Ralf Baechle]

On Tue, Dec 15, 2009 at 01:44:03AM +0100, Florian Fainelli wrote:

> It should, I inverted the semantics. I should think twice before sending stuff :)

That should include Documentation/SubmittingPatches :-)

  Ralf

Re: [PATCH 2/2] MIPS: add readl/write_be

[Sergei Shtylyov]

Hello.

Florian Fainelli wrote:

> From: Florian Fainelli <ffainelli@freebox.fr>
> Subject: [PATCH v3] MIPS: add readl/write_be accessors
>
> MIPS currently lacks the readl_be and writel_be accessors
> which are required by BCM63xx for OHCI and EHCI support.
> Let's define them globally for MIPS. This also fixes the
> compilation of the bcm63xx defconfig against USB.
>
> Changes from v2:
> - fixed the be/cpu endianness inversion
>
> Changes from v1:
> - make it work on little-endian machines
> - protect macros arguments with parenthesis
>   

   You should have put the description of changes under --- tearline, 
not in the patch description itself.

> Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
> ---

WBR, Sergei

Re: [PATCH 2/2] MIPS: add readl/write_be

[Florian Fainelli]

From: Florian Fainelli <ffainelli@freebox.fr>
Subject: [PATCH v3] MIPS: add readl/write_be accessors

MIPS currently lacks the readl_be and writel_be accessors
which are required by BCM63xx for OHCI and EHCI support.
Let's define them globally for MIPS. This also fixes the
compilation of the bcm63xx defconfig against USB.

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
---
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 436878e..65d7843 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -447,6 +447,9 @@ __BUILDIO(q, u64)
 #define readl_relaxed			readl
 #define readq_relaxed			readq
 
+#define readl_be(addr)			be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
+#define writel_be(val, addr)		__raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))
+
 /*
  * Some code tests for these symbols
  */
-- 

Re: [PATCH 2/2] MIPS: add readl/write_be

[Ralf Baechle]

On Wed, Dec 16, 2009 at 11:29:06AM +0100, Florian Fainelli wrote:

> From: Florian Fainelli <ffainelli@freebox.fr>
> Subject: [PATCH v3] MIPS: add readl/write_be accessors
> 
> MIPS currently lacks the readl_be and writel_be accessors
> which are required by BCM63xx for OHCI and EHCI support.
> Let's define them globally for MIPS. This also fixes the
> compilation of the bcm63xx defconfig against USB.

Queued; I've added the b, w and q variants to make the patch feature
complete even though there are probably no users atm.

  Ralf