* [PATCH 1/2] MIPS: Remove probe_tlb().
@ 2010-01-22 22:41 David Daney
2010-01-22 22:41 ` [PATCH 2/2] MIPS: Decode c0_config4 for large TLBs David Daney
2010-01-23 20:07 ` [PATCH 1/2] MIPS: Remove probe_tlb() Ralf Baechle
0 siblings, 2 replies; 3+ messages in thread
From: David Daney @ 2010-01-22 22:41 UTC (permalink / raw)
To: linux-mips, ralf; +Cc: David Daney
The function probe_tlb() only does anything for processors that are
not PRID_COMP_LEGACY. This is precisely the set of processors for
which decode_configs() is called to do identical tlbsize probing
calculations. Therefore probe_tlb() is completely redundant and may
be removed.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
arch/mips/mm/tlb-r4k.c | 31 -------------------------------
1 files changed, 0 insertions(+), 31 deletions(-)
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index b61ad60..7de128a 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -447,34 +447,6 @@ out:
return ret;
}
-static void __cpuinit probe_tlb(unsigned long config)
-{
- struct cpuinfo_mips *c = ¤t_cpu_data;
- unsigned int reg;
-
- /*
- * If this isn't a MIPS32 / MIPS64 compliant CPU. Config 1 register
- * is not supported, we assume R4k style. Cpu probing already figured
- * out the number of tlb entries.
- */
- if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
- return;
-#ifdef CONFIG_MIPS_MT_SMTC
- /*
- * If TLB is shared in SMTC system, total size already
- * has been calculated and written into cpu_data tlbsize
- */
- if((smtc_status & SMTC_TLB_SHARED) == SMTC_TLB_SHARED)
- return;
-#endif /* CONFIG_MIPS_MT_SMTC */
-
- reg = read_c0_config1();
- if (!((config >> 7) & 3))
- panic("No TLB present");
-
- c->tlbsize = ((reg >> 25) & 0x3f) + 1;
-}
-
static int __cpuinitdata ntlb;
static int __init set_ntlb(char *str)
{
@@ -486,8 +458,6 @@ __setup("ntlb=", set_ntlb);
void __cpuinit tlb_init(void)
{
- unsigned int config = read_c0_config();
-
/*
* You should never change this register:
* - On R4600 1.7 the tlbp never hits for pages smaller than
@@ -495,7 +465,6 @@ void __cpuinit tlb_init(void)
* - The entire mm handling assumes the c0_pagemask register to
* be set to fixed-size pages.
*/
- probe_tlb(config);
write_c0_pagemask(PM_DEFAULT_MASK);
#ifndef CONFIG_MAPPED_KERNEL
write_c0_wired(0);
--
1.6.0.6
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] MIPS: Decode c0_config4 for large TLBs.
2010-01-22 22:41 [PATCH 1/2] MIPS: Remove probe_tlb() David Daney
@ 2010-01-22 22:41 ` David Daney
2010-01-23 20:07 ` [PATCH 1/2] MIPS: Remove probe_tlb() Ralf Baechle
1 sibling, 0 replies; 3+ messages in thread
From: David Daney @ 2010-01-22 22:41 UTC (permalink / raw)
To: linux-mips, ralf; +Cc: David Daney
For processors that have more than 64 TLBs, we need to decode both
config1 and config4 to determine the total number TLBs.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
arch/mips/include/asm/mipsregs.h | 3 +++
arch/mips/kernel/cpu-probe.c | 14 ++++++++++++++
2 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 5c192a0..298216e 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -564,6 +564,9 @@
#define MIPS_CONF3_DSP (_ULCAST_(1) << 10)
#define MIPS_CONF3_ULRI (_ULCAST_(1) << 13)
+#define MIPS_CONF4_MMUSIZEEXT (_ULCAST_(255) << 0)
+#define MIPS_CONF4_MMUEXTDEF (_ULCAST_(3) << 14)
+
#define MIPS_CONF7_WII (_ULCAST_(1) << 31)
#define MIPS_CONF7_RPS (_ULCAST_(1) << 2)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 80e202e..517c565 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -691,6 +691,18 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
return config3 & MIPS_CONF_M;
}
+static inline unsigned int decode_config4(struct cpuinfo_mips *c)
+{
+ unsigned int config4;
+
+ config4 = read_c0_config4();
+
+ if ((config4 & MIPS_CONF4_MMUEXTDEF) == 0x4000 && cpu_has_tlb)
+ c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40;
+
+ return config4 & MIPS_CONF_M;
+}
+
static void __cpuinit decode_configs(struct cpuinfo_mips *c)
{
int ok;
@@ -709,6 +721,8 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
ok = decode_config2(c);
if (ok)
ok = decode_config3(c);
+ if (ok)
+ ok = decode_config4(c);
mips_probe_watch_registers(c);
}
--
1.6.0.6
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] MIPS: Remove probe_tlb().
2010-01-22 22:41 [PATCH 1/2] MIPS: Remove probe_tlb() David Daney
2010-01-22 22:41 ` [PATCH 2/2] MIPS: Decode c0_config4 for large TLBs David Daney
@ 2010-01-23 20:07 ` Ralf Baechle
1 sibling, 0 replies; 3+ messages in thread
From: Ralf Baechle @ 2010-01-23 20:07 UTC (permalink / raw)
To: David Daney; +Cc: linux-mips
On Fri, Jan 22, 2010 at 02:41:14PM -0800, David Daney wrote:
> The function probe_tlb() only does anything for processors that are
> not PRID_COMP_LEGACY. This is precisely the set of processors for
> which decode_configs() is called to do identical tlbsize probing
> calculations. Therefore probe_tlb() is completely redundant and may
> be removed.
>
> Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Queued for 2.6.34. Nice cleanup - it also gets rid of another SMTC
dependency.
Thanks,
Ralf
^ permalink raw reply [flat|nested] 3+ messages in thread
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2010-01-23 20:07 ` [PATCH 1/2] MIPS: Remove probe_tlb() Ralf Baechle
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