* [PATCH] MIPS: Decode c0_config4 for large TLBs.
@ 2010-01-25 23:53 David Daney
2010-01-26 0:17 ` Ralf Baechle
0 siblings, 1 reply; 2+ messages in thread
From: David Daney @ 2010-01-25 23:53 UTC (permalink / raw)
To: linux-mips, ralf; +Cc: David Daney
For processors that have more than 64 TLBs, we need to decode both
config1 and config4 to determine the total number TLBs.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
This is the second version, it uses more symbolic values and fewer
magic numbers.
arch/mips/include/asm/mipsregs.h | 4 ++++
arch/mips/kernel/cpu-probe.c | 15 +++++++++++++++
2 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 5c192a0..2cb1f0b 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -564,6 +564,10 @@
#define MIPS_CONF3_DSP (_ULCAST_(1) << 10)
#define MIPS_CONF3_ULRI (_ULCAST_(1) << 13)
+#define MIPS_CONF4_MMUSIZEEXT (_ULCAST_(255) << 0)
+#define MIPS_CONF4_MMUEXTDEF (_ULCAST_(3) << 14)
+#define MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT (_ULCAST_(1) << 14)
+
#define MIPS_CONF7_WII (_ULCAST_(1) << 31)
#define MIPS_CONF7_RPS (_ULCAST_(1) << 2)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 80e202e..b6a5c4a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -691,6 +691,19 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
return config3 & MIPS_CONF_M;
}
+static inline unsigned int decode_config4(struct cpuinfo_mips *c)
+{
+ unsigned int config4;
+
+ config4 = read_c0_config4();
+
+ if ((config4 & MIPS_CONF4_MMUEXTDEF) == MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT
+ && cpu_has_tlb)
+ c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40;
+
+ return config4 & MIPS_CONF_M;
+}
+
static void __cpuinit decode_configs(struct cpuinfo_mips *c)
{
int ok;
@@ -709,6 +722,8 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
ok = decode_config2(c);
if (ok)
ok = decode_config3(c);
+ if (ok)
+ ok = decode_config4(c);
mips_probe_watch_registers(c);
}
--
1.6.0.6
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] MIPS: Decode c0_config4 for large TLBs.
2010-01-25 23:53 [PATCH] MIPS: Decode c0_config4 for large TLBs David Daney
@ 2010-01-26 0:17 ` Ralf Baechle
0 siblings, 0 replies; 2+ messages in thread
From: Ralf Baechle @ 2010-01-26 0:17 UTC (permalink / raw)
To: David Daney; +Cc: linux-mips
On Mon, Jan 25, 2010 at 03:53:49PM -0800, David Daney wrote:
> For processors that have more than 64 TLBs, we need to decode both
> config1 and config4 to determine the total number TLBs.
>
> Signed-off-by: David Daney <ddaney@caviumnetworks.com>
> ---
>
> This is the second version, it uses more symbolic values and fewer
> magic numbers.
Thanks for making this change. Queued for 2.6.34.
Ralf
^ permalink raw reply [flat|nested] 2+ messages in thread
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