From: Ralf Baechle <ralf@linux-mips.org>
To: Shane McDonald <mcdonald.shane@gmail.com>
Cc: Wu Zhangjin <wuzhangjin@gmail.com>,
David VomLehn <dvomlehn@cisco.com>,
mbizon@freebox.fr, linux-mips@linux-mips.org
Subject: Re: [PATCH urgent] MIPS: Fixup of the r4k timer
Date: Wed, 3 Feb 2010 02:29:34 +0100 [thread overview]
Message-ID: <20100203012934.GA20375@linux-mips.org> (raw)
In-Reply-To: <b2b2f2321002011903m7a090481m52d84a664beb5468@mail.gmail.com>
On Mon, Feb 01, 2010 at 09:03:10PM -0600, Shane McDonald wrote:
> On Mon, Feb 1, 2010 at 3:10 AM, Wu Zhangjin <wuzhangjin@gmail.com> wrote:
> >
> > From: Wu Zhangjin <wuzhangjin@gmail.com>
> >
> > As reported by Maxime Bizon, the commit "MIPS: PowerTV: Fix support for
> > timer interrupts with > 64 external IRQs" have broken the r4k timer
> > since it didn't initialize the cp0_compare_irq_shift variable used in
> > c0_compare_int_pending() on the architectures whose cpu_has_mips_r2 is
> > false.
> >
> > This patch fixes it via initializing the cp0_compare_irq_shift as the
> > cp0_compare_irq used in the old c0_compare_int_pending().
> >
> > Reported-by: Maxime Bizon <mbizon@freebox.fr>
> > Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
>
> When applied to 2.6.33-rc6, this patch fixes the problem on my
> RM7035C-based system.
>
> Tested-by: Shane McDonald <mcdonald.shane@gmail.com>
Thanks folks, applied.
Ralf
next prev parent reply other threads:[~2010-02-03 1:29 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-02-01 9:10 [PATCH urgent] MIPS: Fixup of the r4k timer Wu Zhangjin
2010-02-02 3:03 ` Shane McDonald
2010-02-03 1:29 ` Ralf Baechle [this message]
2010-02-03 11:34 ` Cached Base address difference Anoop P.A.
2010-02-03 11:34 ` Anoop P.A.
2010-02-03 12:33 ` Ralf Baechle
2010-02-03 13:38 ` Anoop P.A.
2010-02-03 13:38 ` Anoop P.A.
2010-02-03 19:15 ` Chris Dearman
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