From: Ralf Baechle <ralf@linux-mips.org>
To: Yang Shi <yang.shi@windriver.com>
Cc: ddaney@caviumnetworks.com, ben-linux@fluff.org,
khali@linux-fr.org, linux-mips@linux-mips.org,
linux-i2c@vger.kernel.org
Subject: Re: [PATCH V2] MIPS: Octeon: Register EEPROM device on the I2C bus
Date: Tue, 16 Mar 2010 19:09:46 +0100 [thread overview]
Message-ID: <20100316180946.GC20160@linux-mips.org> (raw)
In-Reply-To: <1268026190-18300-1-git-send-email-yang.shi@windriver.com>
On Mon, Mar 08, 2010 at 01:29:50PM +0800, Yang Shi wrote:
> An SPD resides on 0x50 of the I2C bus on CN56xx/57xx board,
> register this device.
I wonder what the use case for this patch is? Normally Linux doesn't care
about SPD.
I also wonder how this will work for configurations with multiple memory
modules thus multiple SPD EEPROMS.
Ralf
next prev parent reply other threads:[~2010-03-16 18:09 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-08 5:29 [PATCH V2] MIPS: Octeon: Register EEPROM device on the I2C bus Yang Shi
2010-03-08 6:01 ` Wolfram Sang
2010-03-16 18:09 ` Ralf Baechle [this message]
2010-03-16 19:06 ` Jean Delvare
2010-03-18 17:00 ` Ralf Baechle
2010-03-18 17:48 ` Jean Delvare
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