From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: David Daney <ddaney@caviumnetworks.com>,
linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: Re: [PATCH] MIPS: Calculate proper ebase value for 64-bit kernels
Date: Tue, 13 Apr 2010 09:34:38 +0200 [thread overview]
Message-ID: <20100413073435.GA6371@alpha.franken.de> (raw)
In-Reply-To: <1271135034.25797.41.camel@falcon>
On Tue, Apr 13, 2010 at 01:03:54PM +0800, Wu Zhangjin wrote:
> This patch have broken the support to the MIPS variants whose
> cpu_has_mips_r2 is 0 for the CAC_BASE and CKSEG0 is completely different
> in these MIPSs.
I've checked R4k and R10k manulas and the exception base is at CKSEG0, so
about CPU we are talking ? And wouldn't it make for senso to have
an extra define for the exception base then ?
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2010-04-13 7:35 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-06 20:29 [PATCH] MIPS: Calculate proper ebase value for 64-bit kernels David Daney
2010-04-07 15:39 ` Ralf Baechle
2010-04-13 5:03 ` Wu Zhangjin
2010-04-13 7:34 ` Thomas Bogendoerfer [this message]
2010-04-13 17:16 ` Ralf Baechle
2010-04-13 18:15 ` Thomas Bogendoerfer
2010-04-14 8:03 ` Wu Zhangjin
2010-04-14 11:24 ` Thomas Bogendoerfer
2010-04-26 12:13 ` Wu Zhangjin
2010-04-26 17:19 ` David Daney
2010-04-27 2:53 ` Wu Zhangjin
2010-04-27 23:06 ` Maciej W. Rozycki
[not found] <Pine.LNX.4.21.1004270049440.1248-100000@Mobile0.Peter>
2010-04-27 0:22 ` David Daney
2010-04-27 4:05 ` Wu Zhangjin
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