From: Bruno Randolf <randolf.bruno@googlemail.com>
To: linux-mips@linux-mips.org, manuel.lauss@googlemail.com,
ralf@linux-mips.org
Cc: florian@openwrt.org
Subject: [PATCH 2/2] MIPS: MTX-1: cleanup and comments
Date: Mon, 12 Jul 2010 00:40:38 +0900 [thread overview]
Message-ID: <20100711154038.29863.23111.stgit@void> (raw)
In-Reply-To: <20100711154028.29863.74414.stgit@void>
Add some comments about mtx1_pci_idsel() and remove a dead block of old code.
Signed-off-by: Bruno Randolf <br1@einfach.org>
---
arch/mips/alchemy/mtx-1/board_setup.c | 12 ++++--------
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
index 52d883d..3cf2fa2 100644
--- a/arch/mips/alchemy/mtx-1/board_setup.c
+++ b/arch/mips/alchemy/mtx-1/board_setup.c
@@ -105,14 +105,10 @@ void __init board_setup(void)
int
mtx1_pci_idsel(unsigned int devsel, int assert)
{
-#define MTX_IDSEL_ONLY_0_AND_3 0
-#if MTX_IDSEL_ONLY_0_AND_3
- if (devsel != 0 && devsel != 3) {
- printk(KERN_ERR "*** not 0 or 3\n");
- return 0;
- }
-#endif
-
+ /* This function is only necessary to support a proprietary Cardbus
+ * adapter on the mtx-1 "singleboard" variant. It triggers a custom
+ * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
+ */
if (assert && devsel != 0)
/* Suppress signal to Cardbus */
alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
next prev parent reply other threads:[~2010-07-11 15:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-11 15:40 [PATCH 1/2] MIPS: MTX-1: fix PCI on the MeshCube and related boards Bruno Randolf
2010-07-11 15:40 ` Bruno Randolf [this message]
2010-07-11 17:11 ` [PATCH 2/2] MIPS: MTX-1: cleanup and comments Florian Fainelli
2010-07-11 22:34 ` Ralf Baechle
2010-07-11 17:10 ` [PATCH 1/2] MIPS: MTX-1: fix PCI on the MeshCube and related boards Florian Fainelli
2010-07-11 22:25 ` Ralf Baechle
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