[PATCH 0/4] MIPS: BCM47xx: Platfrom updates from OpenWRT

[PATCH 0/4] MIPS: BCM47xx: Platfrom updates from OpenWRT

[Hauke Mehrtens]

This series contains some patches for the Broadcom bcm47xx platform.
Most of these patches have been in OpenWRT for some time and they
should be stable. This work is intended for 2.6.36.

Hauke Mehrtens (4):
  MIPS: BCM47xx: Really fix 128MB RAM problem
  MIPS: BCM47xx: Fill values for b43 into ssb sprom
  MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by default
  MIPS: BCM47xx: Setup and register serial early

 arch/mips/Kconfig         |    1 +
 arch/mips/bcm47xx/prom.c  |   22 ++++--
 arch/mips/bcm47xx/setup.c |  168 ++++++++++++++++++++++++++++++++++++---------
 3 files changed, 149 insertions(+), 42 deletions(-)

[PATCH 1/4] MIPS: BCM47xx: Really fix 128MB RAM problem

[Hauke Mehrtens]

The previews patch 84a6fcb368a080620d12fc4d79e07902dbee7335 was wrong,
I got wrong success reports.

The bcm47xx architecture maps the ram into a 128MB address space. It
will be paced there as often as goes into the 128MB. The detection
tries to find the position where the same memory is found. When reading
over 128MB the processor will throw an exception. If 128MB ram is
installed, it will not find the same memory because it tries to read
over the 128MB boarder. Now it just assumes 128MB installed ram if it
can not find that the ram is repeating.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
 arch/mips/bcm47xx/prom.c |   22 ++++++++++++++--------
 1 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
index 0fa646c..f6e9063 100644
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -126,6 +126,7 @@ static __init void prom_init_cmdline(void)
 static __init void prom_init_mem(void)
 {
 	unsigned long mem;
+	unsigned long max;
 
 	/* Figure out memory size by finding aliases.
 	 *
@@ -134,21 +135,26 @@ static __init void prom_init_mem(void)
 	 * want to reuse the memory used by CFE (around 4MB). That means cfe_*
 	 * functions stop to work at some point during the boot, we should only
 	 * call them at the beginning of the boot.
+	 *
+	 * BCM47XX uses 128MB for addressing the ram, if the system contains
+	 * less that that amount of ram it remaps the ram more often into the
+	 * available space.
+	 * Accessing memory after 128MB will cause an exception.
+	 * max contains the biggest possible address supported by the platform.
+	 * If the method wants to try something above we assume 128MB ram.
 	 */
+	max = ((unsigned long)(prom_init) | ((128 << 20) - 1));
 	for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) {
+		if (((unsigned long)(prom_init) + mem) > max) {
+			mem = (128 << 20);
+			printk(KERN_DEBUG "assume 128MB RAM\n");
+			break;
+		}
 		if (*(unsigned long *)((unsigned long)(prom_init) + mem) ==
 		    *(unsigned long *)(prom_init))
 			break;
 	}
 
-	/* Ignoring the last page when ddr size is 128M. Cached
-	 * accesses to last page is causing the processor to prefetch
-	 * using address above 128M stepping out of the ddr address
-	 * space.
-	 */
-	if (mem == 0x8000000)
-		mem -= 0x1000;
-
 	add_memory_region(0, mem, BOOT_MEM_RAM);
 }
 
-- 
1.7.0.4

[PATCH 2/4] MIPS: BCM47xx: Fill values for b43 into ssb sprom

[Hauke Mehrtens]

Most of the values are stored in the nvram and not in the CFE. At first
the nvram should be read and if there is no value it should look into
the CFE. Now more values are read out because the b43 and b43legacy
drivers needs them.

Some parts of this patch have been in OpenWRT for a long time and were
made by Michael Buesch.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
 arch/mips/bcm47xx/setup.c |  131 +++++++++++++++++++++++++++++++++-----------
 1 files changed, 98 insertions(+), 33 deletions(-)

diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index b1aee33..516ac89 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -74,6 +74,95 @@ static void str2eaddr(char *str, char *dest)
 	}
 }
 
+#define READ_FROM_NVRAM(_outvar, name, buf) \
+	if (nvram_getenv(name, buf, sizeof(buf)) >= 0 || \
+	    cfe_getenv(name, buf, sizeof(buf)) >= 0) \
+		sprom->_outvar = simple_strtoul(buf, NULL, 0);
+
+static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
+{
+	char buf[100];
+	u32 boardflags;
+
+	memset(sprom, 0, sizeof(struct ssb_sprom));
+
+	sprom->revision = 1; /* Fallback: Old hardware does not define this. */
+	READ_FROM_NVRAM(revision, "sromrev", buf);
+	if (nvram_getenv("il0macaddr", buf, sizeof(buf)) >= 0 ||
+	    cfe_getenv("il0macaddr", buf, sizeof(buf)) >= 0)
+		str2eaddr(buf, sprom->il0mac);
+	if (nvram_getenv("et0macaddr", buf, sizeof(buf)) >= 0 ||
+	    cfe_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
+		str2eaddr(buf, sprom->et0mac);
+	if (nvram_getenv("et1macaddr", buf, sizeof(buf)) >= 0 ||
+	    cfe_getenv("et1macaddr", buf, sizeof(buf)) >= 0)
+		str2eaddr(buf, sprom->et1mac);
+	READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
+	READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
+	READ_FROM_NVRAM(et0mdcport, "et0mdcport", buf);
+	READ_FROM_NVRAM(et1mdcport, "et1mdcport", buf);
+	READ_FROM_NVRAM(board_rev, "boardrev", buf);
+	READ_FROM_NVRAM(country_code, "ccode", buf);
+	READ_FROM_NVRAM(ant_available_a, "aa5g", buf);
+	READ_FROM_NVRAM(ant_available_bg, "aa2g", buf);
+	READ_FROM_NVRAM(pa0b0, "pa0b0", buf);
+	READ_FROM_NVRAM(pa0b1, "pa0b1", buf);
+	READ_FROM_NVRAM(pa0b2, "pa0b2", buf);
+	READ_FROM_NVRAM(pa1b0, "pa1b0", buf);
+	READ_FROM_NVRAM(pa1b1, "pa1b1", buf);
+	READ_FROM_NVRAM(pa1b2, "pa1b2", buf);
+	READ_FROM_NVRAM(pa1lob0, "pa1lob0", buf);
+	READ_FROM_NVRAM(pa1lob2, "pa1lob1", buf);
+	READ_FROM_NVRAM(pa1lob1, "pa1lob2", buf);
+	READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
+	READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
+	READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
+	READ_FROM_NVRAM(gpio0, "wl0gpio0", buf);
+	READ_FROM_NVRAM(gpio1, "wl0gpio1", buf);
+	READ_FROM_NVRAM(gpio2, "wl0gpio2", buf);
+	READ_FROM_NVRAM(gpio3, "wl0gpio3", buf);
+	READ_FROM_NVRAM(maxpwr_bg, "pa0maxpwr", buf);
+	READ_FROM_NVRAM(maxpwr_al, "pa1lomaxpwr", buf);
+	READ_FROM_NVRAM(maxpwr_a, "pa1maxpwr", buf);
+	READ_FROM_NVRAM(maxpwr_ah, "pa1himaxpwr", buf);
+	READ_FROM_NVRAM(itssi_a, "pa1itssit", buf);
+	READ_FROM_NVRAM(itssi_bg, "pa0itssit", buf);
+	READ_FROM_NVRAM(tri2g, "tri2g", buf);
+	READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
+	READ_FROM_NVRAM(tri5g, "tri5g", buf);
+	READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
+	READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
+	READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
+	READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
+	READ_FROM_NVRAM(rssismc2g, "rssismc2g", buf);
+	READ_FROM_NVRAM(rssismf2g, "rssismf2g", buf);
+	READ_FROM_NVRAM(bxa2g, "bxa2g", buf);
+	READ_FROM_NVRAM(rssisav5g, "rssisav5g", buf);
+	READ_FROM_NVRAM(rssismc5g, "rssismc5g", buf);
+	READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
+	READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
+	READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
+	READ_FROM_NVRAM(ofdm2gpo, "ofdm2gpo", buf);
+	READ_FROM_NVRAM(ofdm5glpo, "ofdm5glpo", buf);
+	READ_FROM_NVRAM(ofdm5gpo, "ofdm5gpo", buf);
+	READ_FROM_NVRAM(ofdm5ghpo, "ofdm5ghpo", buf);
+
+	if (nvram_getenv("boardflags", buf, sizeof(buf)) >= 0 ||
+	    cfe_getenv("boardflags", buf, sizeof(buf)) >= 0)
+		boardflags = simple_strtoul(buf, NULL, 0);
+	if (boardflags) {
+		sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
+		sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
+	}
+	if (nvram_getenv("boardflags2", buf, sizeof(buf)) >= 0 ||
+	    cfe_getenv("boardflags2", buf, sizeof(buf)) >= 0)
+		boardflags = simple_strtoul(buf, NULL, 0);
+	if (boardflags) {
+		sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
+		sprom->boardflags2_hi = (boardflags & 0xFFFF0000U) >> 16;
+	}
+}
+
 static int bcm47xx_get_invariants(struct ssb_bus *bus,
 				   struct ssb_init_invariants *iv)
 {
@@ -82,43 +171,19 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
 	/* Fill boardinfo structure */
 	memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
 
-	if (cfe_getenv("boardvendor", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("boardvendor", buf, sizeof(buf)) >= 0)
+	iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
+	if (nvram_getenv("boardtype", buf, sizeof(buf)) >= 0 ||
+	    cfe_getenv("boardtype", buf, sizeof(buf)) >= 0)
 		iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
-	if (cfe_getenv("boardtype", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("boardtype", buf, sizeof(buf)) >= 0)
-		iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
-	if (cfe_getenv("boardrev", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("boardrev", buf, sizeof(buf)) >= 0)
+	if (nvram_getenv("boardrev", buf, sizeof(buf)) >= 0 ||
+	    cfe_getenv("boardrev", buf, sizeof(buf)) >= 0)
 		iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
 
-	/* Fill sprom structure */
-	memset(&(iv->sprom), 0, sizeof(struct ssb_sprom));
-	iv->sprom.revision = 3;
-
-	if (cfe_getenv("et0macaddr", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
-		str2eaddr(buf, iv->sprom.et0mac);
-
-	if (cfe_getenv("et1macaddr", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("et1macaddr", buf, sizeof(buf)) >= 0)
-		str2eaddr(buf, iv->sprom.et1mac);
-
-	if (cfe_getenv("et0phyaddr", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("et0phyaddr", buf, sizeof(buf)) >= 0)
-		iv->sprom.et0phyaddr = simple_strtoul(buf, NULL, 0);
-
-	if (cfe_getenv("et1phyaddr", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("et1phyaddr", buf, sizeof(buf)) >= 0)
-		iv->sprom.et1phyaddr = simple_strtoul(buf, NULL, 0);
-
-	if (cfe_getenv("et0mdcport", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("et0mdcport", buf, sizeof(buf)) >= 0)
-		iv->sprom.et0mdcport = simple_strtoul(buf, NULL, 10);
+	bcm47xx_fill_sprom(&iv->sprom);
 
-	if (cfe_getenv("et1mdcport", buf, sizeof(buf)) >= 0 ||
-	    nvram_getenv("et1mdcport", buf, sizeof(buf)) >= 0)
-		iv->sprom.et1mdcport = simple_strtoul(buf, NULL, 10);
+	if (nvram_getenv("cardbus", buf, sizeof(buf)) >= 0 ||
+	    cfe_getenv("cardbus", buf, sizeof(buf)) >= 0)
+		iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
 
 	return 0;
 }
-- 
1.7.0.4

[PATCH 3/4] MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by default

[Hauke Mehrtens]

The b43_pci_bridge is needed to use the b43 driver with brcm47xx.
Activate it by default if pci is available.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
 arch/mips/Kconfig |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 85dac72..aaca439 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -71,6 +71,7 @@ config BCM47XX
 	select SSB_DRIVER_MIPS
 	select SSB_DRIVER_EXTIF
 	select SSB_EMBEDDED
+	select SSB_B43_PCI_BRIDGE if PCI
 	select SSB_PCICORE_HOSTMODE if PCI
 	select GENERIC_GPIO
 	select SYS_HAS_EARLY_PRINTK
-- 
1.7.0.4

[PATCH 4/4] MIPS: BCM47xx: Setup and register serial early

[Hauke Mehrtens]

Swap the first and second serial if console=ttyS1 was set.
Set it up and register it for early serial support.

This patch has been in OpenWRT for a long time.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
 arch/mips/bcm47xx/setup.c |   37 ++++++++++++++++++++++++++++++++++++-
 1 files changed, 36 insertions(+), 1 deletions(-)

diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 516ac89..a40d88e 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -28,6 +28,8 @@
 #include <linux/types.h>
 #include <linux/ssb/ssb.h>
 #include <linux/ssb/ssb_embedded.h>
+#include <linux/serial.h>
+#include <linux/serial_8250.h>
 #include <asm/bootinfo.h>
 #include <asm/reboot.h>
 #include <asm/time.h>
@@ -190,12 +192,45 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
 
 void __init plat_mem_setup(void)
 {
-	int err;
+	int i, err;
+	char buf[100];
+	struct ssb_mipscore *mcore;
 
 	err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
 				      bcm47xx_get_invariants);
 	if (err)
 		panic("Failed to initialize SSB bus (err %d)\n", err);
+	mcore = &ssb_bcm47xx.mipscore;
+
+	nvram_getenv("kernel_args", buf, sizeof(buf));
+	if (!strncmp(buf, "console=ttyS1", 13)) {
+		struct ssb_serial_port port;
+
+		printk(KERN_DEBUG "Swapping serial ports!\n");
+		/* swap serial ports */
+		memcpy(&port, &mcore->serial_ports[0], sizeof(port));
+		memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
+		       sizeof(port));
+		memcpy(&mcore->serial_ports[1], &port, sizeof(port));
+	}
+
+	for (i = 0; i < mcore->nr_serial_ports; i++) {
+		struct ssb_serial_port *port = &(mcore->serial_ports[i]);
+		struct uart_port s;
+
+		memset(&s, 0, sizeof(s));
+		s.line = i;
+		s.mapbase = (unsigned int) port->regs;
+		s.membase = port->regs;
+		s.irq = port->irq + 2;
+		s.uartclk = port->baud_base;
+		s.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
+		s.iotype = SERIAL_IO_MEM;
+		s.regshift = port->reg_shift;
+
+		early_serial_setup(&s);
+	}
+	printk(KERN_DEBUG "Serial init done.\n");
 
 	_machine_restart = bcm47xx_machine_restart;
 	_machine_halt = bcm47xx_machine_halt;
-- 
1.7.0.4

Re: [PATCH 4/4] MIPS: BCM47xx: Setup and register serial early

[Sergei Shtylyov]

Hello.

Hauke Mehrtens wrote:

> Swap the first and second serial if console=ttyS1 was set.
> Set it up and register it for early serial support.

> This patch has been in OpenWRT for a long time.

> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
[...]
> diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
> index 516ac89..a40d88e 100644
> --- a/arch/mips/bcm47xx/setup.c
> +++ b/arch/mips/bcm47xx/setup.c
[...]
> @@ -190,12 +192,45 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
>  
>  void __init plat_mem_setup(void)
>  {
> -	int err;
> +	int i, err;
> +	char buf[100];
> +	struct ssb_mipscore *mcore;
>  
>  	err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
>  				      bcm47xx_get_invariants);
>  	if (err)
>  		panic("Failed to initialize SSB bus (err %d)\n", err);
> +	mcore = &ssb_bcm47xx.mipscore;
> +
> +	nvram_getenv("kernel_args", buf, sizeof(buf));
> +	if (!strncmp(buf, "console=ttyS1", 13)) {

    Perhaps strstr()? Else you're limiting the console= parameter to always 
come first in the command line...

> +	for (i = 0; i < mcore->nr_serial_ports; i++) {
> +		struct ssb_serial_port *port = &(mcore->serial_ports[i]);
> +		struct uart_port s;
> +
> +		memset(&s, 0, sizeof(s));
> +		s.line = i;
> +		s.mapbase = (unsigned int) port->regs;
> +		s.membase = port->regs;

    Is the MMIO region identity-mapped? Why you have the same value in the 
'mapbase' and 'membase' fields?

WBR, Sergei

Re: [PATCH 1/4] MIPS: BCM47xx: Really fix 128MB RAM problem

[Ralf Baechle]

Thanks, applied.

  Ralf

Re: [PATCH 2/4] MIPS: BCM47xx: Fill values for b43 into ssb sprom

[Ralf Baechle]

Thanks, applied.

  Ralf

Re: [PATCH 3/4] MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by default

[Ralf Baechle]

Thanks, applied.

  Ralf

Re: [PATCH 4/4] MIPS: BCM47xx: Setup and register serial early

[Ralf Baechle]

Hauke,

can you sort out the issues raised by Sergei and repost?  I'll drop this
patch for now.

Thanks,

  Ralf

Re: [PATCH 2/4] MIPS: BCM47xx: Fill values for b43 into ssb sprom

[Ralf Baechle]

On Mon, Aug 02, 2010 at 04:31:03PM +0100, Ralf Baechle wrote:
> Date: Mon, 2 Aug 2010 16:31:03 +0100
> From: Ralf Baechle <ralf@linux-mips.org>
> To: Hauke Mehrtens <hauke@hauke-m.de>
> Cc: linux-mips@linux-mips.org
> Subject: Re: [PATCH 2/4] MIPS: BCM47xx: Fill values for b43 into ssb sprom
> Content-Type: text/plain; charset=us-ascii
> 
> Thanks, applied.

Causes warnings which then break the build.  Dropped.

  Ralf

Re: [PATCH 2/4] MIPS: BCM47xx: Fill values for b43 into ssb sprom

[Hauke Mehrtens]

Am 02.08.2010 21:25, schrieb Ralf Baechle:
> On Mon, Aug 02, 2010 at 04:31:03PM +0100, Ralf Baechle wrote:
>> Date: Mon, 2 Aug 2010 16:31:03 +0100
>> From: Ralf Baechle <ralf@linux-mips.org>
>> To: Hauke Mehrtens <hauke@hauke-m.de>
>> Cc: linux-mips@linux-mips.org
>> Subject: Re: [PATCH 2/4] MIPS: BCM47xx: Fill values for b43 into ssb sprom
>> Content-Type: text/plain; charset=us-ascii
>>
>> Thanks, applied.
> 
> Causes warnings which then break the build.  Dropped.
> 
>   Ralf

Hi,

what warnings and error messages do you get?

Hauke