From: Ralf Baechle <ralf@linux-mips.org>
To: "Edgar E. Iglesias" <edgar.iglesias@axis.com>
Cc: COLin <colin@realtek.com>,
"linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Subject: Re: 24k data cache, PIPT or VIPT?
Date: Sun, 23 Jan 2011 19:11:13 +0100 [thread overview]
Message-ID: <20110123181113.GA12232@linux-mips.org> (raw)
In-Reply-To: <20110123043439.GA20840@laped.lan>
On Sun, Jan 23, 2011 at 05:34:39AM +0100, Edgar E. Iglesias wrote:
> This line is confusing:
> "This bit is only set if the data cache config and MMU type would normally cause aliasing"
>
> because I don't know what they mean by "normally".
Normally means the behaviour expected from a text book implementation of a
VIPT cache.
Ralf
next prev parent reply other threads:[~2011-01-24 14:13 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-21 8:52 24k data cache, PIPT or VIPT? COLin
2011-01-21 21:54 ` David VomLehn (dvomlehn)
2011-01-21 21:54 ` David VomLehn (dvomlehn)
2011-01-23 4:34 ` Edgar E. Iglesias
2011-01-23 18:11 ` Ralf Baechle [this message]
2011-01-24 12:47 ` Ralf Baechle
2011-01-24 12:47 ` Ralf Baechle
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