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From: Florian Fainelli <florian@openwrt.org>
To: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: ralf@linux-mips.org, linux-mips@linux-mips.org
Subject: Re: [PATCH 2/5] MIPS: bcm63xx: fix SDRAM size computation for BCM6345
Date: Thu, 22 Sep 2011 18:48:22 +0200	[thread overview]
Message-ID: <201109221848.22794.florian@openwrt.org> (raw)
In-Reply-To: <4E7B0C02.7060703@mvista.com>

On Thursday 22 September 2011 12:20:50 Sergei Shtylyov wrote:
> Hello.
> 
> On 21-09-2011 17:39, Florian Fainelli wrote:
> > From: Florian Fainelli<ffainelli@freebox.fr>
> > 
> > Instead of hardcoding the amount of available RAM, read the number of
> > effective multiples of 8MB from SDRAM_MBASE_REG.
> > 
> > Signed-off-by: Florian Fainelli<florian@openwrt.org>
> > ---
> > 
> >   arch/mips/bcm63xx/cpu.c |    6 ++++--
> >   1 files changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
> > index 7c7e4d4..7ad1b39 100644
> > --- a/arch/mips/bcm63xx/cpu.c
> > +++ b/arch/mips/bcm63xx/cpu.c
> > @@ -260,8 +260,10 @@ static unsigned int detect_memory_size(void)
> > 
> >   	unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
> >   	u32 val;
> > 
> > -	if (BCMCPU_IS_6345())
> > -		return (8 * 1024 * 1024);
> > +	if (BCMCPU_IS_6345()) {
> > +		val = bcm_sdram_readl(SDRAM_MBASE_REG);
> > +		return (val * 8 * 1024 * 1024);
> 
>     Parens not needed here.

For consistency with other parts of the code, I would rather keep it.
-- 
Florian

  reply	other threads:[~2011-09-22 16:49 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-21 13:39 [PATCH 1/5] MIPS: bcm63xx: define SDRAM_MBASE_REG Florian Fainelli
2011-09-21 13:39 ` [PATCH 1/3] MIPS: introduce GENERIC_DUMP_TLB Florian Fainelli
2011-09-21 13:48   ` Florian Fainelli
2011-09-21 13:39 ` [PATCH 2/5] MIPS: bcm63xx: fix SDRAM size computation for BCM6345 Florian Fainelli
2011-09-22 10:20   ` Sergei Shtylyov
2011-09-22 16:48     ` Florian Fainelli [this message]
2011-09-21 13:39 ` [PATCH 2/3] MIPS: introduce CPU_R4K_FPU Florian Fainelli
2011-09-21 13:39 ` [PATCH 3/5] MIPS: bcm63xx: define MPI_BASE for BCM6345 Florian Fainelli
2011-09-21 13:39 ` [PATCH 3/3] MIPS: introduce CPU_R4K_CACHE_TLB Florian Fainelli
2011-09-21 13:39 ` [PATCH 4/5] MIPS: bcm63xx: remove BCM6345 hacks to read base boot address Florian Fainelli
2011-09-21 13:39 ` [PATCH 5/5] MIPS: bcm63xx: fix GPIO set/get for BCM6345 Florian Fainelli

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