Linux MIPS Architecture development
 help / color / mirror / Atom feed
From: "Jayachandran C." <jchandra@broadcom.com>
To: "Hill, Steven" <sjhill@mips.com>
Cc: "David Daney" <ddaney.cavm@gmail.com>,
	"linux-mips@linux-mips.org" <linux-mips@linux-mips.org>,
	"ralf@linux-mips.org" <ralf@linux-mips.org>
Subject: Re: [PATCH v3] MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.
Date: Sat, 5 Jan 2013 01:21:58 +0530	[thread overview]
Message-ID: <20130104195157.GA2140@jayachandranc.netlogicmicro.com> (raw)
In-Reply-To: <31E06A9FC96CEC488B43B19E2957C1B801146AF100@exchdb03.mips.com>

On Fri, Jan 04, 2013 at 06:24:54PM +0000, Hill, Steven wrote:
> >> +#ifdef CONFIG_64BIT
> >> +                     (PAGE_SHIFT - PTE_ORDER - PTE_T_LOG2 - 1));
> >> +#else
> >> +                     (PGDIR_SHIFT - PAGE_SHIFT - 1));
> >> +#endif
> >> +             UASM_i_INS(p, ptr, tmp, (PTE_T_LOG2 + 1),
> >
> > As far as I can tell, (PAGE_SHIFT - PTE_ORDER - PTE_T_LOG2 - 1) and
> > (PGDIR_SHIFT - PAGE_SHIFT - 1) are the same thing.  So why the two cases?
> >
> >Can you give an example of where they might differ?
> >
> David,
> 
> Actually, no I cannot. The calculation was given to me by 'jchandra' and since I do not have 64-bit R2 hardware let alone the Broadcom platform, he said it worked on his platform and I took it from him as is. So does this patch work on Cavium platforms using both calculation methods? It would be nice if 'jchandra' could chime in, but he may be on holiday or something.

This does not really need hardware. On 64bit, with 16k page, the expansion of
the macro is (from tlbex.i):

uasm_i_dext(p, tmp, tmp, 14 +1, ((14 + (14 + 0 - 3)) + (14 + 0 - 3))-14 -1); 

This evaluates to 21, which is obviously wrong (should be 10).

I had sent the generated tlb handler which showed the incorrect size to sjhill,
but that probably got lost in the new year holiday mails.

JC.

      reply	other threads:[~2013-01-04 19:50 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-04 17:59 [PATCH v3] MIPS: Optimise TLB handlers for MIPS32/64 R2 cores Steven J. Hill
2013-01-04 18:14 ` David Daney
2013-01-04 18:24   ` Hill, Steven
2013-01-04 19:51     ` Jayachandran C. [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20130104195157.GA2140@jayachandranc.netlogicmicro.com \
    --to=jchandra@broadcom.com \
    --cc=ddaney.cavm@gmail.com \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    --cc=sjhill@mips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox