From: Ralf Baechle <ralf@linux-mips.org>
To: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org, "Steven J. Hill" <Steven.Hill@imgtec.com>
Subject: Re: 74K/1074K support
Date: Tue, 1 Oct 2013 14:54:21 +0200 [thread overview]
Message-ID: <20131001125420.GA12616@linux-mips.org> (raw)
In-Reply-To: <5249ED1E.4050106@imgtec.com>
On Mon, Sep 30, 2013 at 02:29:02PM -0700, Leonid Yegoshin wrote:
> On 09/24/2013 10:27 PM, Ralf Baechle wrote:
> >Commit 006a851b10a395955c153a145ad8241494d43688 adds 74K support in c-r4k.c:
> >
> >+static inline void alias_74k_erratum(struct cpuinfo_mips *c)
> >+{
> >+ /*
> >+ * Early versions of the 74K do not update the cache tags on a
> >+ * vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG
> >+ * aliases. In this case it is better to treat the cache as always
> >+ * having aliases.
> >+ */
> >+ if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0))
> >+ c->dcache.flags |= MIPS_CACHE_VTAG;
> >+ if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0))
> >+ write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
> >+ if (((c->processor_id & 0xff00) == PRID_IMP_1074K) &&
> >+ ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0))) {
> >+ c->dcache.flags |= MIPS_CACHE_VTAG;
> >+ write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
> >+ }
> >+}
> >
> >But MIPS D-caches are never virtually tagged, so there is nothing in
> >the kernel that ever tests the MIPS_CACHE_VTAG flag in a D-cache
> >descriptor.
> >
> >Cargo cult programming at its finest? Or was MIPS_CACHE_ALIASES what
> >really was meant to be set?
> >
> > Ralf
>
> There is a problem on early versions of 74K/1074K which can be effectively cured by setting MIPS_CACHE_VTAG.
> It enforces the needed cache handling.
> I hope it will go away as customers replace RTL for newer versions.
> But I prefer the patch version from Maciej W. Rozycki, it is more clear.
There is nothing in the kernel that _reads_ that flag if it's set in an
I-cache descriptor. See:
arch/mips/include/asm/cpu-features.h:#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
arch/mips/include/asm/cpu-info.h:#define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */
arch/mips/mm/c-octeon.c: c->icache.flags |= MIPS_CACHE_VTAG;
arch/mips/mm/c-octeon.c: c->icache.flags |= MIPS_CACHE_VTAG;
arch/mips/mm/c-octeon.c: c->icache.flags |= MIPS_CACHE_VTAG;
arch/mips/mm/c-r4k.c: c->dcache.flags |= MIPS_CACHE_VTAG;
arch/mips/mm/c-r4k.c: c->dcache.flags |= MIPS_CACHE_VTAG;
arch/mips/mm/c-r4k.c: c->icache.flags |= MIPS_CACHE_VTAG;
arch/mips/mm/c-r4k.c: c->icache.flags |= MIPS_CACHE_VTAG;
arch/mips/mm/c-r4k.c: c->icache.flags & MIPS_CACHE_VTAG ? "VIVT" : "VIPT",
There simply is not support whatsoever for virtually tagged D-caches in
the kernel, so setting that flag may feel good - but achieves nothing.
See, the sole test for the MIPS_CACHE_VTAG above tests it in a D-cache
descriptor. So I'm not sure what the intention is. Maybe there is some
code that has not yet been merged?
Ralf
next prev parent reply other threads:[~2013-10-01 12:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-25 5:27 74K/1074K support Ralf Baechle
2013-09-30 21:29 ` Leonid Yegoshin
2013-09-30 21:29 ` Leonid Yegoshin
2013-10-01 12:54 ` Ralf Baechle [this message]
2013-10-01 18:06 ` Leonid Yegoshin
2013-10-01 18:06 ` Leonid Yegoshin
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