From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
stable@vger.kernel.org, Huacai Chen <chenhc@lemote.com>,
Jie Chen <chenj@lemote.com>, Rui Wang <wangr@lemote.com>,
John Crispin <john@phrozen.org>,
"Steven J. Hill" <Steven.Hill@imgtec.com>,
linux-mips@linux-mips.org, Fuxin Zhang <zhangfx@lemote.com>,
Zhangjin Wu <wuzhangjin@gmail.com>,
Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH 3.10 22/71] MIPS: Remove BUG_ON(!is_fpu_owner()) in do_ade()
Date: Mon, 15 Sep 2014 12:26:20 -0700 [thread overview]
Message-ID: <20140915192639.448447285@linuxfoundation.org> (raw)
In-Reply-To: <20140915192638.702282534@linuxfoundation.org>
3.10-stable review patch. If anyone has any objections, please let me know.
------------------
From: Huacai Chen <chenhc@lemote.com>
commit 2e5767a27337812f6850b3fa362419e2f085e5c3 upstream.
In do_ade(), is_fpu_owner() isn't preempt-safe. For example, when an
unaligned ldc1 is executed, do_cpu() is called and then FPU will be
enabled (and TIF_USEDFPU will be set for the current process). Then,
do_ade() is called because the access is unaligned. If the current
process is preempted at this time, TIF_USEDFPU will be cleard. So when
the process is scheduled again, BUG_ON(!is_fpu_owner()) is triggered.
This small program can trigger this BUG in a preemptible kernel:
int main (int argc, char *argv[])
{
double u64[2];
while (1) {
asm volatile (
".set push \n\t"
".set noreorder \n\t"
"ldc1 $f3, 4(%0) \n\t"
".set pop \n\t"
::"r"(u64):
);
}
return 0;
}
V2: Remove the BUG_ON() unconditionally due to Paul's suggestion.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Jie Chen <chenj@lemote.com>
Signed-off-by: Rui Wang <wangr@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/mips/kernel/unaligned.c | 1 -
1 file changed, 1 deletion(-)
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -604,7 +604,6 @@ static void emulate_load_store_insn(stru
case sdc1_op:
die_if_kernel("Unaligned FP access in kernel code", regs);
BUG_ON(!used_math());
- BUG_ON(!is_fpu_owner());
lose_fpu(1); /* Save FPU state for the emulator. */
res = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1,
next prev parent reply other threads:[~2014-09-15 19:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20140915192638.702282534@linuxfoundation.org>
2014-09-15 19:26 ` [PATCH 3.10 19/71] MIPS: GIC: Prevent array overrun Greg Kroah-Hartman
2014-09-15 19:26 ` [PATCH 3.10 20/71] MIPS: Prevent user from setting FCSR cause bits Greg Kroah-Hartman
2014-09-15 19:26 ` [PATCH 3.10 21/71] MIPS: tlbex: Fix a missing statement for HUGETLB Greg Kroah-Hartman
2014-09-15 19:26 ` Greg Kroah-Hartman [this message]
2014-09-15 19:26 ` [PATCH 3.10 23/71] MIPS: asm/reg.h: Make 32- and 64-bit definitions available at the same time Greg Kroah-Hartman
2014-09-15 19:26 ` [PATCH 3.10 25/71] MIPS: asm: thread_info: Add _TIF_SECCOMP flag Greg Kroah-Hartman
2014-09-15 19:26 ` [PATCH 3.10 27/71] MIPS: Fix accessing to per-cpu data when flushing the cache Greg Kroah-Hartman
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