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[46.59.216.211]) by mx.google.com with ESMTPSA id lu12sm8274722wic.4.2014.09.25.00.36.10 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Sep 2014 00:36:10 -0700 (PDT) Date: Thu, 25 Sep 2014 09:36:09 +0200 From: Thierry Reding To: Yijing Wang Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Xinwei Hu , Wuyun , linux-arm-kernel@lists.infradead.org, Russell King , linux-arch@vger.kernel.org, arnab.basu@freescale.com, Bharat.Bhushan@freescale.com, x86@kernel.org, Arnd Bergmann , Thomas Gleixner , Konrad Rzeszutek Wilk , xen-devel@lists.xenproject.org, Joerg Roedel , iommu@lists.linux-foundation.org, linux-mips@linux-mips.org, Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Sebastian Ott , Tony Luck , linux-ia64@vger.kernel.org, "David S. Miller" , sparclinux@vger.kernel.org, Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , Sergei Shtylyov , Michael Ellerman , Thomas Petazzoni Subject: Re: [PATCH v2 14/22] MIPS/Xlp/MSI: Use MSI chip framework to configure MSI/MSI-X irq Message-ID: <20140925073608.GK12423@ulmo> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> <1411614872-4009-15-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="6K2R/cS9K4qvcBNq" Content-Disposition: inline In-Reply-To: <1411614872-4009-15-git-send-email-wangyijing@huawei.com> User-Agent: Mutt/1.5.23 (2014-03-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 42803 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: thierry.reding@gmail.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips --6K2R/cS9K4qvcBNq Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Sep 25, 2014 at 11:14:24AM +0800, Yijing Wang wrote: > Use MSI chip framework instead of arch MSI functions to configure > MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Nit: s/irq/IRQ/ in the above. > Signed-off-by: Yijing Wang > --- > arch/mips/pci/msi-xlp.c | 14 ++++++++++++-- > 1 files changed, 12 insertions(+), 2 deletions(-) >=20 > diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c > index e469dc7..6b791ef 100644 > --- a/arch/mips/pci/msi-xlp.c > +++ b/arch/mips/pci/msi-xlp.c > @@ -245,7 +245,7 @@ static struct irq_chip xlp_msix_chip =3D { > .irq_unmask =3D unmask_msi_irq, > }; > =20 > -void arch_teardown_msi_irq(unsigned int irq) > +void xlp_teardown_msi_irq(unsigned int irq) Should this not be static now as well? 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