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From: Peter Zijlstra <peterz@infradead.org>
To: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org, Zubair.Kakakhel@imgtec.com,
	david.daney@cavium.com, paul.gortmaker@windriver.com,
	davidlohr@hp.com, macro@linux-mips.org, chenhc@lemote.com,
	zajec5@gmail.com, james.hogan@imgtec.com, keescook@chromium.org,
	alex@alex-smith.me.uk, tglx@linutronix.de, blogic@openwrt.org,
	jchandra@broadcom.com, paul.burton@imgtec.com,
	qais.yousef@imgtec.com, linux-kernel@vger.kernel.org,
	ralf@linux-mips.org, markos.chandras@imgtec.com,
	manuel.lauss@gmail.com, akpm@linux-foundation.org,
	lars.persson@axis.com
Subject: Re: [PATCH 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack
Date: Sat, 4 Oct 2014 22:00:16 +0200	[thread overview]
Message-ID: <20141004200016.GB7509@worktop.ger.corp.intel.com> (raw)
In-Reply-To: <20141004031730.28569.38511.stgit@linux-yegoshin>

On Fri, Oct 03, 2014 at 08:17:30PM -0700, Leonid Yegoshin wrote:

> --- a/arch/mips/include/asm/switch_to.h
> +++ b/arch/mips/include/asm/switch_to.h
> @@ -17,6 +17,7 @@
>  #include <asm/dsp.h>
>  #include <asm/cop2.h>
>  #include <asm/msa.h>
> +#include <asm/mmu_context.h>
>  
>  struct task_struct;
>  
> @@ -104,6 +105,16 @@ do {									\
>  	disable_msa();							\
>  } while (0)
>  
> +static inline void flush_vdso_page(void)
> +{
> +	if (current->mm && cpu_context(raw_smp_processor_id(), current->mm) &&
> +	    (current->mm->context.vdso_asid[raw_smp_processor_id()] ==
> +	     cpu_asid(raw_smp_processor_id(), current->mm))) {
> +		local_flush_tlb_page(current->mm->mmap, (unsigned long)current->mm->context.vdso);
> +		current->mm->context.vdso_asid[raw_smp_processor_id()] = 0;
> +	}
> +}

Why raw_smp_processor_id() and why evaluate it 3 times, sure compilers
can be expected to do some CSE but something like:

	int cpu = smp_processor_id();

	if ( ... [cpu] ...)

is far more readable as well.

> +
>  #define finish_arch_switch(prev)					\
>  do {									\
>  	u32 __c0_stat;							\
> @@ -118,6 +129,7 @@ do {									\
>  		__restore_dsp(current);					\
>  	if (cpu_has_userlocal)						\
>  		write_c0_userlocal(current_thread_info()->tp_value);	\
> +	flush_vdso_page();                                              \
>  	__restore_watch();						\
>  } while (0)

So what I didn't see is any talk about the cost of this. Surely a TLB
flush isn't exactly free.

  parent reply	other threads:[~2014-10-04 20:00 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-04  3:17 [PATCH 0/3] MIPS executable stack protection Leonid Yegoshin
2014-10-04  3:17 ` Leonid Yegoshin
2014-10-04  3:17 ` [PATCH 1/3] MIPS: mips_flush_cache_range is added Leonid Yegoshin
2014-10-04  3:17   ` Leonid Yegoshin
2014-10-04  3:17 ` [PATCH 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack Leonid Yegoshin
2014-10-04  3:17   ` Leonid Yegoshin
2014-10-04 20:00   ` Peter Zijlstra [this message]
2014-10-05  5:52     ` Leonid Yegoshin
2014-10-06 12:29   ` Paul Burton
2014-10-06 12:29     ` Paul Burton
2014-10-06 20:42     ` Leonid Yegoshin
2014-10-06 20:42       ` Leonid Yegoshin
2014-10-06 18:05   ` David Daney
2014-10-06 20:03     ` Leonid Yegoshin
2014-10-06 20:03       ` Leonid Yegoshin
2014-10-04  3:17 ` [PATCH 3/3] MIPS: set stack/data protection as non-executable Leonid Yegoshin
2014-10-04  3:17   ` Leonid Yegoshin
2014-10-04  8:23 ` [PATCH 0/3] MIPS executable stack protection Peter Zijlstra
2014-10-04 16:03   ` Linus Torvalds
2014-10-04 16:17     ` Leonid Yegoshin
2014-10-04 16:27       ` Linus Torvalds

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