From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Oct 2014 00:43:14 +0200 (CEST) Received: from mailapp01.imgtec.com ([195.59.15.196]:21336 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27010880AbaJIWnMWClVq (ORCPT ); Fri, 10 Oct 2014 00:43:12 +0200 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 91084A23EECCF; Thu, 9 Oct 2014 23:43:01 +0100 (IST) Received: from KLMAIL02.kl.imgtec.org (10.40.60.222) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 9 Oct 2014 23:43:05 +0100 Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by klmail02.kl.imgtec.org (10.40.60.222) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 9 Oct 2014 23:43:05 +0100 Received: from localhost (192.168.154.101) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 9 Oct 2014 23:43:04 +0100 Date: Thu, 9 Oct 2014 23:43:04 +0100 From: James Hogan To: Leonid Yegoshin CC: , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack Message-ID: <20141009224304.GA4818@jhogan-linux.le.imgtec.org> References: <20141009195030.31230.58695.stgit@linux-yegoshin> <20141009200017.31230.69698.stgit@linux-yegoshin> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline In-Reply-To: <20141009200017.31230.69698.stgit@linux-yegoshin> User-Agent: Mutt/1.5.23 (2014-03-12) X-Originating-IP: [192.168.154.101] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 43176 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: james.hogan@imgtec.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips Hi Leonid, On Thu, Oct 09, 2014 at 01:00:17PM -0700, Leonid Yegoshin wrote: > Signal happend during run in emulation block is handled properly - EPC is > changed to before an emulated jump or to target address, depending from point of > signal. Great! > Small stack of emulation blocks is supported because nested traps are possible > in MIPS32/64 R6 emulation mix with FPU emulation. Could you please clarify how this nesting of emulation blocks could happen now that signals are handled more cleanly. I.e. isn't the emuframe stuff only required for instructions in branch delay slots, and branches shouldn't be in branch delay slots anyway, so I don't get how they could nest. Thanks James From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailapp01.imgtec.com ([195.59.15.196]:21336 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27010880AbaJIWnMWClVq (ORCPT ); Fri, 10 Oct 2014 00:43:12 +0200 Date: Thu, 9 Oct 2014 23:43:04 +0100 From: James Hogan Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack Message-ID: <20141009224304.GA4818@jhogan-linux.le.imgtec.org> References: <20141009195030.31230.58695.stgit@linux-yegoshin> <20141009200017.31230.69698.stgit@linux-yegoshin> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline In-Reply-To: <20141009200017.31230.69698.stgit@linux-yegoshin> Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: Leonid Yegoshin Cc: linux-mips@linux-mips.org, Zubair.Kakakhel@imgtec.com, geert+renesas@glider.be, david.daney@cavium.com, peterz@infradead.org, paul.gortmaker@windriver.com, davidlohr@hp.com, macro@linux-mips.org, chenhc@lemote.com, richard@nod.at, zajec5@gmail.com, keescook@chromium.org, alex@alex-smith.me.uk, tglx@linutronix.de, blogic@openwrt.org, jchandra@broadcom.com, paul.burton@imgtec.com, qais.yousef@imgtec.com, linux-kernel@vger.kernel.org, ralf@linux-mips.org, markos.chandras@imgtec.com, dengcheng.zhu@imgtec.com, manuel.lauss@gmail.com, akpm@linux-foundation.org, lars.persson@axis.com Message-ID: <20141009224304.6RPyeEEuESuav9mJiBr2HUehgtiGcKWq5aNkvlwB0MA@z> Hi Leonid, On Thu, Oct 09, 2014 at 01:00:17PM -0700, Leonid Yegoshin wrote: > Signal happend during run in emulation block is handled properly - EPC is > changed to before an emulated jump or to target address, depending from point of > signal. Great! > Small stack of emulation blocks is supported because nested traps are possible > in MIPS32/64 R6 emulation mix with FPU emulation. Could you please clarify how this nesting of emulation blocks could happen now that signals are handled more cleanly. I.e. isn't the emuframe stuff only required for instructions in branch delay slots, and branches shouldn't be in branch delay slots anyway, so I don't get how they could nest. Thanks James