From: Ralf Baechle <ralf@linux-mips.org>
To: Lars Persson <lars.persson@axis.com>,
Jayachandran C <jchandra@broadcom.com>
Cc: David Daney <ddaney.cavm@gmail.com>,
"linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Subject: Re: [PATCH] MIPS: Remove race window in page fault handling
Date: Wed, 3 Dec 2014 14:37:29 +0100 [thread overview]
Message-ID: <20141203133729.GB16063@linux-mips.org> (raw)
In-Reply-To: <771471B8871B5044A6CA7CCD9C26EEE10117E31EC89D@xmail2.se.axis.com>
On Tue, Jun 03, 2014 at 12:29:17PM +0200, Lars Persson wrote:
> Good point. Would adding !cpu_has_ic_fills_f_dc as an extra condition in set_pte_at be sufficient to address your concern ?
Returning to this old thread ...
cpu_has_ic_fills_f_dc means a CPU's data cache does not need to be
written back to secondary cache or memory when instructions have been
updated in memory. In other words a CPU can refill the I-cache from
the D-cache on an I-cache miss.
Only the Alchemy cores have this handy property.
The flag is also being set for XL? CPUs in
arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
but not anywhere in the probe code of arch/mips/mm/c-r4k.c which might
stil be correct - but it's at least a bit sloppy and suspicious so I'm
wondering if it's correct indeed. Jayachandran?
Ralf
next prev parent reply other threads:[~2014-12-03 13:37 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-31 10:36 [PATCH] MIPS: Remove race window in page fault handling Lars Persson
2014-06-02 16:47 ` David Daney
2014-06-03 10:29 ` Lars Persson
2014-12-03 13:37 ` Ralf Baechle [this message]
2014-12-04 5:55 ` Jayachandran C.
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