Re: [PATCH] MIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controller

[Ralf Baechle <ralf@linux-mips.org>]

On Mon, Jan 19, 2015 at 04:19:20AM -0500, Joshua Kinard wrote:

> From: Joshua Kinard <kumba@gentoo.org>
> 
> On SGI Origin 2k/Onyx2 and SGI Octane systems, there can exist multiple PCI
> buses attached to the Xtalk bus.  The current code will stop counting PCI buses
> after it finds the first one.  If one installs the optional PCI cardcage
> ("shoebox") into these systems, because of the order of the Xtalk widgets, the
> current PCI code will find the cardcage first, and fail to detect the BaseIO
> PCI devices, which are on a higher Xtalk widget ID.
> 
> This patch adds the hooks needed for resolving this issue in the IP27 PCI code
> (in a later patch).
> 
> Verified on both an SGI Onyx2 and an SGI Octane.
> 
> Signed-off-by: Joshua Kinard <kumba@gentoo.org>
> ---
>  arch/mips/include/asm/pci.h        |    2 ++
>  arch/mips/include/asm/pci/bridge.h |    1 +
>  arch/mips/pci/pci.c                |    5 ++++-
>  3 files changed, 7 insertions(+), 1 deletion(-)
> 
> Ralf,
> 
>   I have the needed IP27 changes, but I tied them up with some cleanups to the
> Xtalk code to make it more centralized so I could remove duplicate code from
> the Octane's patches.  I've still gotta fiddle with that code some more and
> remove the debug bits, but this change should be safe to go in by itself, as
> it's a prerequisite.  I'll probably send the IP27 bits in along with the IOC3
> stuff, because IP27 seems to be very flakey (at least my Onyx2 was) with the
> in-tree IOC3 bits.  Most common was requiring several reboots to properly
> detect the MAC address.  Under the metadriver, it detects things fine.

There's a long-standing defect in the IOC3 code resulting in bad timing
for the 1-Wire bus driver.  The reason is that some bitfield is incorrectly
sized resulting in overflow.

As for the patch itself - everybody had their fair chance at yelling, nobody
did so I queued it up for 4.1.

  Ralf