From: Ralf Baechle <ralf@linux-mips.org>
To: Paul Burton <paul.burton@imgtec.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: linux-mips@linux-mips.org, Lars-Peter Clausen <lars@metafoo.de>,
Qais Yousef <qais.yousef@imgtec.com>,
Andrew Bresticker <abrestic@chromium.org>,
linux-kernel@vger.kernel.org, Felix Fietkau <nbd@openwrt.org>
Subject: Re: [PATCH v5 06/37] MIPS: irq_cpu: declare irqchip table entry
Date: Tue, 26 May 2015 17:38:59 +0200 [thread overview]
Message-ID: <20150526153859.GA18514@linux-mips.org> (raw)
In-Reply-To: <1432480307-23789-7-git-send-email-paul.burton@imgtec.com>
On Sun, May 24, 2015 at 04:11:16PM +0100, Paul Burton wrote:
> Subject: [PATCH v5 06/37] MIPS: irq_cpu: declare irqchip table entry
> Content-Type: text/plain
>
> Allow the MIPS CPU interrupt controller to be probed from DT using the
> generic __irqchip_of_table for platforms which use irqchip_init. This
> will avoid such platforms needing to duplicate the compatible string &
> init function pointer.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Lars-Peter Clausen <lars@metafoo.de>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: linux-mips@linux-mips.org
> ---
>
> Changes in v5: None
> Changes in v4: None
> Changes in v3:
> - Rebase.
>
> Changes in v2: None
>
> arch/mips/kernel/irq_cpu.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
> index 6eb7a3f..f96313d 100644
> --- a/arch/mips/kernel/irq_cpu.c
> +++ b/arch/mips/kernel/irq_cpu.c
> @@ -38,6 +38,8 @@
> #include <asm/mipsmtregs.h>
> #include <asm/setup.h>
>
> +#include "../../drivers/irqchip/irqchip.h"
> +
> static inline void unmask_mips_irq(struct irq_data *d)
> {
> set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
> @@ -167,3 +169,4 @@ int __init mips_cpu_irq_of_init(struct device_node *of_node,
> __mips_cpu_irq_init(of_node);
> return 0;
> }
> +IRQCHIP_DECLARE(cpu_intc, "mti,cpu-interrupt-controller", mips_cpu_irq_of_init);
Having to type "../" to get an include file should be a strong indicator
something is wrong. In this case it probably means irq_cpu.c should be
moved to drivers/irqchip/.
The same gem also exists in arch/arc/kernel/irq.c and arch/microblaze/-
kernel/intc.c. And two more files arch/arm/mach-imx/gpc.c and
arch/arm/mach-omap2/omap-wakeupgen.c are avoiding the issue by coding
their private variants of IRQCHIP_DECLARE.
Ralf
next prev parent reply other threads:[~2015-05-26 15:39 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-24 15:11 [PATCH v5 00/37] JZ4780 & CI20 support Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 01/37] devicetree/bindings: add Ingenic Semiconductor vendor prefix Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 02/37] devicetree/bindings: add Qi Hardware " Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 03/37] MIPS: JZ4740: introduce CONFIG_MACH_INGENIC Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 04/37] MIPS: ingenic: add newer vendor IDs Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 05/37] MIPS: JZ4740: require & include DT Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 06/37] MIPS: irq_cpu: declare irqchip table entry Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-26 15:38 ` Ralf Baechle [this message]
2015-05-24 15:11 ` [PATCH v5 07/37] MIPS: JZ4740: probe CPU interrupt controller via DT Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:17 ` Sergei Shtylyov
2015-05-24 22:37 ` [PATCH v6 " Paul Burton
2015-05-24 22:37 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 08/37] MIPS: JZ4740: use generic plat_irq_dispatch Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 09/37] MIPS: JZ4740: move arch_init_irq out of arch/mips/jz4740/irq.c Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 10/37] devicetree: document Ingenic SoC interrupt controller binding Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 11/37] MIPS: JZ4740: probe interrupt controller via DT Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 12/37] MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DT Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 13/37] MIPS: JZ4740: register an irq_domain for the interrupt controller Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 14/37] MIPS: JZ4740: drop intc debugfs code Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 15/37] MIPS: JZ4740: remove jz_intc_base global Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 16/37] MIPS: JZ4740: support >32 interrupts Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 17/37] MIPS: JZ4740: define IRQ numbers based on number of intc IRQs Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 18/37] MIPS: JZ4740: read intc base address from DT Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 19/37] MIPS: JZ4740: avoid JZ4740-specific naming Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 20/37] MIPS: JZ4740: support newer SoC interrupt controllers Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 21/37] irqchip: move Ingenic SoC intc driver to drivers/irqchip Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 22/37] MIPS: JZ4740: call jz4740_clock_init earlier Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 23/37] MIPS: JZ4740: replace use of jz4740_clock_bdata Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 24/37] devicetree: add Ingenic CGU binding documentation Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 25/37] clk: ingenic: add driver for Ingenic SoC CGU clocks Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 26/37] MIPS,clk: migrate JZ4740 to common clock framework Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 27/37] MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cgu Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 28/37] MIPS, clk: move jz4740 UDC auto suspend functions " Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 29/37] MIPS, clk: move jz4740 clock suspend, resume " Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 30/37] clk: ingenic: add JZ4780 CGU support Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-06-03 23:32 ` Michael Turquette
2015-06-03 23:32 ` Michael Turquette
2015-05-24 15:11 ` [PATCH v5 31/37] MIPS: JZ4740: remove clock.h Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 32/37] MIPS: JZ4740: only detect RAM size if not specified in DT Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 33/37] devicetree: document Ingenic SoC UART binding Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 34/37] serial: 8250_ingenic: support for Ingenic SoC UARTs Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-31 21:49 ` Greg Kroah-Hartman
2015-05-24 15:11 ` [PATCH v5 35/37] MIPS: JZ4740: use Ingenic SoC UART driver Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 36/37] MIPS: ingenic: initial JZ4780 support Paul Burton
2015-05-24 15:11 ` Paul Burton
2015-05-25 11:03 ` Hauke Mehrtens
2015-05-26 7:25 ` Paul Burton
2015-05-26 7:25 ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 37/37] MIPS: ingenic: initial MIPS Creator CI20 support Paul Burton
2015-05-24 15:11 ` Paul Burton
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