From: Alban <albeu@free.fr>
To: Felix Fietkau <nbd@nbd.name>
Cc: Aban Bedel <albeu@free.fr>,
linux-mips@linux-mips.org, sergei.shtylyov@cogentembedded.com
Subject: Re: [PATCH v2 1/2] MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer SoCs
Date: Fri, 20 May 2016 14:49:18 +0200 [thread overview]
Message-ID: <20160520144918.792b4795@tock> (raw)
In-Reply-To: <1463421115-19048-1-git-send-email-nbd@nbd.name>
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On Mon, 16 May 2016 19:51:54 +0200
Felix Fietkau <nbd@nbd.name> wrote:
> AR913x, AR724x and AR933x are the only SoCs where the
> ath79_ddr_wb_flush_base starts at 0x7c, all newer SoCs use 0x9c
> Invert the logic to make the code compatible with AR95xx
>
> Signed-off-by: Felix Fietkau <nbd@nbd.name>
Acked-by: Aban Bedel <albeu@free.fr>
Alban
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prev parent reply other threads:[~2016-05-20 12:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-16 17:51 [PATCH v2 1/2] MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer SoCs Felix Fietkau
2016-05-16 17:51 ` [PATCH v2 2/2] MIPS: ath79: fix regression in PCI window initialization Felix Fietkau
2016-05-20 13:10 ` Alban
2016-05-20 12:49 ` Alban [this message]
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