From: Ralf Baechle <ralf@linux-mips.org>
To: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org, john@phrozen.org
Subject: Re: [PATCH] MIPS: lantiq: lock DMA register accesses for SMP
Date: Tue, 24 Jan 2017 19:16:24 +0100 [thread overview]
Message-ID: <20170124181624.GA29473@linux-mips.org> (raw)
In-Reply-To: <1483096707-21711-1-git-send-email-hauke@hauke-m.de>
On Fri, Dec 30, 2016 at 12:18:27PM +0100, Hauke Mehrtens wrote:
> The DMA controller channel and port configuration is changed by
> selecting the port or channel in one register and then update the
> configuration in other registers. This has to be done in an atomic
> operation. Previously only the local interrupts were deactivated which
> works for single CPU systems. If the system supports SMP a better
> locking is needed, use spinlocks instead.
> On more recent SoCs (at least xrx200 and later) there are two memory
> regions to change the configuration, there we could use one area for
> each CPU and do not have to synchronize between the CPUs and more.
You should always use proper locking, not interrupt fiddlery for proper
serialization. On UP kernels the spinlocks will expand to call just
the local_irq_* so no overhead.
Applied,
Ralf
prev parent reply other threads:[~2017-01-24 18:16 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-30 11:18 [PATCH] MIPS: lantiq: lock DMA register accesses for SMP Hauke Mehrtens
2017-01-24 18:16 ` Ralf Baechle [this message]
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