From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
stable@vger.kernel.org, Huacai Chen <chenhc@lemote.com>,
John Crispin <john@phrozen.org>,
"Steven J . Hill" <Steven.Hill@caviumnetworks.com>,
Fuxin Zhang <zhangfx@lemote.com>,
Zhangjin Wu <wuzhangjin@gmail.com>,
linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH 4.9 053/152] MIPS: c-r4k: Fix Loongson-3s vcache/scache waysize calculation
Date: Mon, 10 Apr 2017 18:41:45 +0200 [thread overview]
Message-ID: <20170410164202.813467311@linuxfoundation.org> (raw)
In-Reply-To: <20170410164159.934755016@linuxfoundation.org>
4.9-stable review patch. If anyone has any objections, please let me know.
------------------
From: Huacai Chen <chenhc@lemote.com>
commit 0be032c190abcdcfa948082b6a1e0d461184ba4d upstream.
If scache.waysize is 0, r4k___flush_cache_all() will do nothing and
then cause bugs. BTW, though vcache.waysize isn't being used by now,
we also fix its calculation.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@caviumnetworks.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15756/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/mips/mm/c-r4k.c | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1558,6 +1558,7 @@ static void probe_vcache(void)
vcache_size = c->vcache.sets * c->vcache.ways * c->vcache.linesz;
c->vcache.waybit = 0;
+ c->vcache.waysize = vcache_size / c->vcache.ways;
pr_info("Unified victim cache %ldkB %s, linesize %d bytes.\n",
vcache_size >> 10, way_string[c->vcache.ways], c->vcache.linesz);
@@ -1660,6 +1661,7 @@ static void __init loongson3_sc_init(voi
/* Loongson-3 has 4 cores, 1MB scache for each. scaches are shared */
scache_size *= 4;
c->scache.waybit = 0;
+ c->scache.waysize = scache_size / c->scache.ways;
pr_info("Unified secondary cache %ldkB %s, linesize %d bytes.\n",
scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
if (scache_size)
prev parent reply other threads:[~2017-04-10 16:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20170410164159.934755016@linuxfoundation.org>
2017-04-10 16:41 ` [PATCH 4.9 046/152] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels Greg Kroah-Hartman
2017-04-10 16:41 ` [PATCH 4.9 047/152] MIPS: ralink: Fix typos in rt3883 pinctrl Greg Kroah-Hartman
2017-04-10 16:41 ` [PATCH 4.9 048/152] MIPS: End spinlocks with .insn Greg Kroah-Hartman
2017-04-10 16:41 ` [PATCH 4.9 049/152] MIPS: Lantiq: fix missing xbar kernel panic Greg Kroah-Hartman
2017-04-10 16:41 ` [PATCH 4.9 050/152] MIPS: Check TLB before handle_ri_rdhwr() for Loongson-3 Greg Kroah-Hartman
2017-04-10 16:41 ` [PATCH 4.9 051/152] MIPS: Add MIPS_CPU_FTLB for Loongson-3A R2 Greg Kroah-Hartman
2017-04-10 16:41 ` [PATCH 4.9 052/152] MIPS: Flush wrong invalid FTLB entry for huge page Greg Kroah-Hartman
2017-04-10 16:41 ` Greg Kroah-Hartman [this message]
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