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From:   Christoph Hellwig <hch@lst.de>
To:     David Daney <ddaney@caviumnetworks.com>
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Subject: Re: mb() calls in octeon / loongson swiotlb dma_map_ops
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On Thu, Jan 04, 2018 at 05:21:17PM -0800, David Daney wrote:
> It has been a while since I wrote that code.  It is possible that the 
> barriers are redundant.
>
> On OCTEON, we the primitive that accomplishes the DMA-Sync operation is the 
> MIPS "SYNC" instruction, which ensures that all stores are committed to the 
> coherency point (L2 Cache) before the DMA is initiated.  The mb(), is 
> implemented as SYNC, so we use that instead of open coding the 'asm 
> volatile("sync" ::: "memory);' in the SWIOTLB operations.

Ok.  And given that apparently octeon only uses swiotlb ops that's where
they were fitted in, instead of dma_cache_wback.

> Does the SWIOTLB DMA mapping code chain to the underlying systems DMA 
> mapping?  If so, the barriers there would be all that is necessary.

It doesn't.  But it also seems the underlying mips_default_dma_map_ops
ops is using entirely different interface for cache writeback before
dma.