From: James Hogan <jhogan@kernel.org>
To: Matt Redfearn <matt.redfearn@mips.com>
Cc: "IKEGAMI Tokunori" <ikegami@allied-telesis.co.jp>,
"linux-mips@linux-mips.org" <linux-mips@linux-mips.org>,
"PACKHAM Chris" <chris.packham@alliedtelesis.co.nz>,
"Hauke Mehrtens" <hauke@hauke-m.de>,
"Rafał Miłecki" <zajec5@gmail.com>
Subject: Re: MIPS: BCM47XX: Enable MIPS32 74K Core ExternalSync for BCM47XX PCIe erratum
Date: Tue, 24 Apr 2018 13:32:17 +0100 [thread overview]
Message-ID: <20180424123216.GB25058@saruman> (raw)
In-Reply-To: <f7af849f-f720-fc95-b6b9-8a0f94e04e9f@mips.com>
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On Tue, Apr 24, 2018 at 01:06:14PM +0100, Matt Redfearn wrote:
> >> +/* ExternalSync */
> >> +#define MIPS_CONF7_ES (_ULCAST_(1) << 8)
>
> Since the config7 register is implementation specific, may I suggest
> changing the MIPS_ prefix to something vendor specific such as
> BRCM_CONF7_ES and start a new section with a comment like:
>
> /* Config7 Bits specific to Broadcom implementations */
See here:
> >> + case CPU_74K:
So its MIPS 74K specific, and some other cores have it too (I checked
P5600 and interAptiv manuals, so I'd guess most recentish MIPS cores).
So maybe its worth s/MIPS/MTI/ to clarify it isn't part of the MIPS32
architecture.
Note that the same applies to all the CONF6 and CONF7 definitions around
there, but its worth getting this one right now I think, lets not
unnecessarily add a new definition and have to rename it later.
Cheers
James
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next prev parent reply other threads:[~2018-04-24 12:32 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-24 7:33 MIPS: BCM47XX: Enable MIPS32 74K Core ExternalSync for BCM47XX PCIe erratum IKEGAMI Tokunori
2018-04-24 11:49 ` James Hogan
2018-04-24 12:06 ` Matt Redfearn
2018-04-24 12:32 ` James Hogan [this message]
2018-04-24 16:39 ` IKEGAMI Tokunori
2018-04-24 16:00 ` IKEGAMI Tokunori
2018-04-24 19:19 ` [PATCH] " smtpuser
2018-04-24 21:42 ` Hauke Mehrtens
2018-04-25 1:28 ` IKEGAMI Tokunori
2018-05-28 0:34 ` IKEGAMI Tokunori
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