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        id 1fGw22-000061-OR; Fri, 11 May 2018 02:35:34 +0200
Date:   Fri, 11 May 2018 02:35:34 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Paul Burton <paul.burton@mips.com>
Cc:     netdev@vger.kernel.org, linux-mips@linux-mips.org,
        "David S . Miller" <davem@davemloft.net>
Subject: Re: [PATCH v6 6/6] MIPS: Boston: Adjust DT for pch_gbe PHY support
Message-ID: <20180511003534.GF5527@lunn.ch>
References: <20180510231657.28503-1-paul.burton@mips.com>
 <20180510231657.28503-7-paul.burton@mips.com>
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>  				eg20t_mac@2,0,1 {
>  					compatible = "pci8086,8802";
>  					reg = <0x00020100 0 0 0 0>;
> -					phy-reset-gpios = <&eg20t_gpio 6
> -							   GPIO_ACTIVE_LOW>;
> +
> +					#address-cells = <1>;
> +					#size-cells = <0>;

It is generally a good idea to put an 'mdio' container which the PHYs
are on. You then pass this container node to of_mdiobus_register().

> +
> +					ethernet-phy@0 {
> +						compatible = "ethernet-phy-id001c.c915";
> +						reg = <0>;
> +						reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
> +						reset-assert-us = <25000>;
> +						reset-deassert-us = <25000>;
> +					};

  Andrew