From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
stable@vger.kernel.org, Mathias Kresin <dev@kresin.me>,
Ralf Baechle <ralf@linux-mips.org>,
linux-mips@linux-mips.org, James Hogan <jhogan@kernel.org>,
Sasha Levin <alexander.levin@microsoft.com>
Subject: [PATCH 4.14 410/496] MIPS: ath79: Fix AR724X_PLL_REG_PCIE_CONFIG offset
Date: Mon, 28 May 2018 12:03:15 +0200 [thread overview]
Message-ID: <20180528100337.034682667@linuxfoundation.org> (raw)
In-Reply-To: <20180528100319.498712256@linuxfoundation.org>
4.14-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mathias Kresin <dev@kresin.me>
[ Upstream commit 05454c1bde91fb013c0431801001da82947e6b5a ]
According to the QCA u-boot source the "PCIE Phase Lock Loop
Configuration (PCIE_PLL_CONFIG)" register is for all SoCs except the
QCA955X and QCA956X at offset 0x10.
Since the PCIE PLL config register is only defined for the AR724x fix
only this value. The value is wrong since the day it was added and isn't
used by any driver yet.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16048/
Signed-off-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -167,7 +167,7 @@
#define AR71XX_AHB_DIV_MASK 0x7
#define AR724X_PLL_REG_CPU_CONFIG 0x00
-#define AR724X_PLL_REG_PCIE_CONFIG 0x18
+#define AR724X_PLL_REG_PCIE_CONFIG 0x10
#define AR724X_PLL_FB_SHIFT 0
#define AR724X_PLL_FB_MASK 0x3ff
next prev parent reply other threads:[~2018-05-28 11:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20180528100319.498712256@linuxfoundation.org>
2018-05-28 9:56 ` [PATCH 4.14 001/496] MIPS: c-r4k: Fix data corruption related to cache coherence Greg Kroah-Hartman
2018-05-28 9:56 ` [PATCH 4.14 002/496] MIPS: ptrace: Expose FIR register through FP regset Greg Kroah-Hartman
2018-05-28 9:56 ` [PATCH 4.14 003/496] MIPS: Fix ptrace(2) PTRACE_PEEKUSR and PTRACE_POKEUSR accesses to o32 FGRs Greg Kroah-Hartman
2018-05-28 9:56 ` [PATCH 4.14 004/496] KVM: Fix spelling mistake: "cop_unsuable" -> "cop_unusable" Greg Kroah-Hartman
2018-05-28 9:57 ` [PATCH 4.14 057/496] MIPS: generic: Fix machine compatible matching Greg Kroah-Hartman
2018-05-28 10:03 ` Greg Kroah-Hartman [this message]
2018-05-28 10:04 ` [PATCH 4.14 475/496] MIPS: Octeon: Fix logging messages with spurious periods after newlines Greg Kroah-Hartman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180528100337.034682667@linuxfoundation.org \
--to=gregkh@linuxfoundation.org \
--cc=alexander.levin@microsoft.com \
--cc=dev@kresin.me \
--cc=jhogan@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=ralf@linux-mips.org \
--cc=stable@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox