From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Aug 2018 13:45:15 +0200 (CEST) Received: from outils.crapouillou.net ([89.234.176.41]:40086 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23994701AbeHGLmmL5ilB (ORCPT ); Tue, 7 Aug 2018 13:42:42 +0200 From: Paul Cercueil To: Vinod Koul , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , Zubair Lutfullah Kakakhel Cc: Paul Cercueil , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Daniel Silsby Subject: [PATCH v4 13/18] dmaengine: dma-jz4780: Set DTCn register explicitly Date: Tue, 7 Aug 2018 13:42:13 +0200 Message-Id: <20180807114218.20091-14-paul@crapouillou.net> In-Reply-To: <20180807114218.20091-1-paul@crapouillou.net> References: <20180807114218.20091-1-paul@crapouillou.net> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1533642161; bh=rFmand/bmQWqAV2RJt6xKDPcYkecvE3f/44OTYi0yBU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=DmjoBsFGp83TnkDhXMQBURvJS/gIYjckpnRhu5WHzy1Ti4hR5yW7Hp/matFQsbiw3vhl3+xW+SrGw8rsTbY5JesnCSF3BhD0JGBNXx7mJ+7H+K8nWsDExg6otIQ9E0cXGGP4C+G9kjlyftk5utY91jmqgWzK+fsC24WAdHNQDaE= Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 65460 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: paul@crapouillou.net Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips From: Daniel Silsby Normally, we wouldn't set the channel transfer count register directly when using descriptor-driven transfers. However, there is no harm in doing so, and it allows jz4780_dma_desc_residue() to report the correct residue of an ongoing transfer, no matter when it is called. Signed-off-by: Daniel Silsby Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre --- drivers/dma/dma-jz4780.c | 9 +++++++++ 1 file changed, 9 insertions(+) v2: No change v3: No change v4: Add my Signed-off-by diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c index 019cebc2e5e5..d03711834a44 100644 --- a/drivers/dma/dma-jz4780.c +++ b/drivers/dma/dma-jz4780.c @@ -532,6 +532,15 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan) jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DRT, jzchan->transfer_type); + /* + * Set the transfer count. This is redundant for a descriptor-driven + * transfer. However, there can be a delay between the transfer start + * time and when DTCn reg contains the new transfer count. Setting + * it explicitly ensures residue is computed correctly at all times. + */ + jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DTC, + jzchan->desc->desc[jzchan->curr_hwdesc].dtc); + /* Write descriptor address and initiate descriptor fetch. */ desc_phys = jzchan->desc->desc_phys + (jzchan->curr_hwdesc * sizeof(*jzchan->desc->desc)); -- 2.11.0