From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 29 Aug 2018 23:36:25 +0200 (CEST) Received: from outils.crapouillou.net ([89.234.176.41]:40804 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23994573AbeH2VdTHK7ap (ORCPT ); Wed, 29 Aug 2018 23:33:19 +0200 From: Paul Cercueil To: Vinod Koul , Ralf Baechle , Paul Burton Cc: od@zcrc.me, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Daniel Silsby , Paul Cercueil Subject: [PATCH v5 13/18] dmaengine: dma-jz4780: Set DTCn register explicitly Date: Wed, 29 Aug 2018 23:32:55 +0200 Message-Id: <20180829213300.22829-14-paul@crapouillou.net> In-Reply-To: <20180829213300.22829-1-paul@crapouillou.net> References: <20180829213300.22829-1-paul@crapouillou.net> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1535578398; bh=wBcNmBnqQKtkU2S10+UH6pynUHfBfHNfnHqd15R9rdE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=IFjCsUND0a/KpR7tyUMvaBCgNP+uQuP3tPHZWzS0jX13yTUTf74+GdWlfRW7/s9Psz7oBp6jNhDtfh9wGhTcASHysqr76x3qaCgPz4Z6sZVEtWAj8+oAA5fbJGoKeNu9JRJXjKHintOcqmSg2pcrYlDXVuCBedm2GMr5GR6TbaU= Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 65792 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: paul@crapouillou.net Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips From: Daniel Silsby Normally, we wouldn't set the channel transfer count register directly when using descriptor-driven transfers. However, there is no harm in doing so, and it allows jz4780_dma_desc_residue() to report the correct residue of an ongoing transfer, no matter when it is called. Signed-off-by: Daniel Silsby Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre --- Notes: v2: No change v3: No change v4: Add my Signed-off-by v5: No change drivers/dma/dma-jz4780.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c index d055602a92ca..d3b915ec8a09 100644 --- a/drivers/dma/dma-jz4780.c +++ b/drivers/dma/dma-jz4780.c @@ -532,6 +532,15 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan) jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DRT, jzchan->transfer_type); + /* + * Set the transfer count. This is redundant for a descriptor-driven + * transfer. However, there can be a delay between the transfer start + * time and when DTCn reg contains the new transfer count. Setting + * it explicitly ensures residue is computed correctly at all times. + */ + jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DTC, + jzchan->desc->desc[jzchan->curr_hwdesc].dtc); + /* Write descriptor address and initiate descriptor fetch. */ desc_phys = jzchan->desc->desc_phys + (jzchan->curr_hwdesc * sizeof(*jzchan->desc->desc)); -- 2.11.0