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From: kernel@xen0n.name
To: linux-mips@vger.kernel.org
Cc: Wang Xuerui <wangxuerui@qiniu.com>,
	Huacai Chen <chenhc@lemote.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	James Hogan <jhogan@kernel.org>,
	Paul Burton <paul.burton@mips.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	linux-mips@linux-mips.org
Subject: [RFC PATCH 0/2] MIPS: Loongson: ExtCC clocksource support
Date: Sun, 24 Feb 2019 17:36:33 +0800	[thread overview]
Message-ID: <20190224093635.1242-1-kernel@xen0n.name> (raw)

From: Wang Xuerui <wangxuerui@qiniu.com>

Hi,

This is my WIP patchset to add support for using the on-chip ExtCC
(external counter) register as clocksource, to boost the real-time
performance on Loongson platform. I'm posting this to solicit comments
and get some of the unresolved questions answered.

* I don't have access to multi-socket ccNUMA Loongson boards. The code
  most certainly doesn't work on such hardware, so either someone with
  expertise would teach me how to do this, or get this done on their
  own.
* I'm not sure of the pipeline behavior of the rdhwr instruction used.
  The current implementation has a sync (roughly the x86 way), and I'm
  not sure if it can be safely omitted, or even moved into the delay
  slot on return.
* Clock skew can be a concern, but it seems there's no generic mechanism
  for clocksource calibration. The x86 code has one supporting PIT/HPET-
  based calibration, but that code never got extracted to common
  framework.
* The VDSO performance seems very bad comparing to x86, even after
  adjusting for the cycle frequency difference. But I haven't thoroughly
  profiled this and perhaps won't have enough spare time for doing so
  (kernel work isn't part of my day job).  So maybe someone could
  provide some hints in this area?

Can only come up with so many points for now; I'll add if more ideas
turn up.

P.S. I have to change to my personal address for outgoing mails; my
work address is hosted on QQ Enterprise Mail, which most certainly is
blocked altogether by linux-mips.org.

Wang Xuerui (2):
  MIPS: Loongson: add extcc clocksource
  MIPS: VDSO: support extcc-based timekeeping

 arch/mips/include/asm/clocksource.h           |  1 +
 arch/mips/include/asm/mach-loongson64/extcc.h | 26 +++++++++
 arch/mips/loongson64/Kconfig                  | 13 +++++
 arch/mips/loongson64/common/Makefile          |  5 ++
 arch/mips/loongson64/common/extcc.c           | 54 +++++++++++++++++++
 arch/mips/loongson64/common/time.c            |  7 +++
 arch/mips/vdso/gettimeofday.c                 |  8 +++
 7 files changed, 114 insertions(+)
 create mode 100644 arch/mips/include/asm/mach-loongson64/extcc.h
 create mode 100644 arch/mips/loongson64/common/extcc.c

-- 
2.20.1


             reply	other threads:[~2019-02-24  9:45 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-24  9:36 kernel [this message]
2019-02-24  9:36 ` [RFC PATCH 1/2] MIPS: Loongson: add extcc clocksource kernel
2019-02-28  3:12   ` Paul Burton
2019-02-24  9:36 ` [RFC PATCH 2/2] MIPS: VDSO: support extcc-based timekeeping kernel
2019-02-28  3:17   ` Paul Burton
  -- strict thread matches above, loose matches on Subject: below --
2019-02-25  5:28 [RFC PATCH 0/2] MIPS: Loongson: ExtCC clocksource support Jiaxun Yang
2019-02-25  6:05 ` Wang Xuerui

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