From: Fredrik Noring <noring@nocrew.org>
To: Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
James Hogan <jhogan@kernel.org>,
linux-mips@vger.kernel.org
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: [RFC] MIPS: Install final length of TLB refill handler rather than 256 bytes
Date: Fri, 5 Apr 2019 18:05:31 +0200 [thread overview]
Message-ID: <20190405160531.GF33393@sx9> (raw)
The R5900 TLB refill handler is limited to 128 bytes, corresponding
to 32 instructions.
Installing a 256 byte TLB refill handler for the R5900 at address
0x80000000 overwrites the performance counter handler at address
0x80000080, according to the TX79 manual[1]:
Table 5-2. Exception Vectors for Level 1 exceptions
Exceptions | Vector Address
| BEV = 0 | BEV = 1
---------------------+------------+-----------
TLB Refill (EXL = 0) | 0x80000000 | 0xBFC00200
TLB Refill (EXL = 1) | 0x80000180 | 0xBFC00380
Interrupt | 0x80000200 | 0xBFC00400
Others | 0x80000180 | 0xBFC00380
---------------------+------------+-----------
Table 5-3. Exception Vectors for Level 2 exceptions
Exceptions | Vector Address
| DEV = 0 | DEV = 1
---------------------+------------+-----------
Reset, NMI | 0xBFC00000 | 0xBFC00000
Performance Counter | 0x80000080 | 0xBFC00280
Debug, SIO | 0x80000100 | 0xBFC00300
---------------------+------------+-----------
Reference:
[1] "TX System RISC TX79 Core Architecture" manual, revision 2.0,
Toshiba Corporation, p. 5-7, https://wiki.qemu.org/File:C790.pdf
Signed-off-by: Fredrik Noring <noring@nocrew.org>
---
Hi MIPS maintainers,
Reading through the TX79 manual I noticed that the installation of
the TLB refill handler seems to overwrite the performance counter
handler. Is there any particular reason to not install the actual
lengths of the handlers, such as memory boundaries or alignments?
I have a separate patch that checks the R5900 handler length limit,
but it depends on R5900 support, which isn't merged (yet).
Fredrik
---
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1462,9 +1462,9 @@ static void build_r4000_tlb_refill_handler(void)
pr_debug("Wrote TLB refill handler (%u instructions).\n",
final_len);
- memcpy((void *)ebase, final_handler, 0x100);
- local_flush_icache_range(ebase, ebase + 0x100);
- dump_handler("r4000_tlb_refill", (u32 *)ebase, (u32 *)(ebase + 0x100));
+ memcpy((void *)ebase, final_handler, 4 * final_len);
+ local_flush_icache_range(ebase, ebase + 4 * final_len);
+ dump_handler("r4000_tlb_refill", (u32 *)ebase, (u32 *)(ebase + 4 * final_len));
}
static void setup_pw(void)
next reply other threads:[~2019-04-05 16:12 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-05 16:05 Fredrik Noring [this message]
2019-04-14 21:20 ` [RFC] MIPS: Install final length of TLB refill handler rather than 256 bytes Philippe Mathieu-Daudé
2019-04-15 15:22 ` Fredrik Noring
2019-04-15 17:17 ` Paul Burton
2019-04-22 17:34 ` Fredrik Noring
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