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From: Sudeep Holla <sudeep.holla@arm.com>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Huacai Chen <chenhc@lemote.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Robert Richter <rric@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <maz@kernel.org>,
	Paul Burton <paulburton@kernel.org>,
	Allison Randal <allison@lohutok.net>,
	Enrico Weigelt <info@metux.net>,
	Kate Stewart <kstewart@linuxfoundation.org>,
	Vladimir Kondratiev <vladimir.kondratiev@intel.com>,
	Richard Fontana <rfontana@redhat.com>,
	Paul Cercueil <paul@crapouillou.net>,
	Zhou Yanjie <zhouyanjie@zoho.com>,
	Sudeep Holla <sudeep.holla@arm.com>
Subject: Re: [PATCH 05/12] MIPS: Switch to arch_topology
Date: Thu, 9 Apr 2020 13:53:10 +0100	[thread overview]
Message-ID: <20200409125310.GA9655@bogus> (raw)
In-Reply-To: <20200409190713.3a695115@flygoat-x1e>

On Thu, Apr 09, 2020 at 07:07:13PM +0800, Jiaxun Yang wrote:
> On Thu, 9 Apr 2020 11:58:32 +0100
> Sudeep Holla <sudeep.holla@arm.com> wrote:
>
> > On Thu, Apr 09, 2020 at 06:35:21PM +0800, Jiaxun Yang wrote:
> > >
> > >
> > > 于 2020年4月9日 GMT+08:00 下午6:31:21, Sudeep Holla
> > > <sudeep.holla@arm.com> 写到:
> > > >On Wed, Apr 08, 2020 at 07:34:15PM +0800, Jiaxun Yang wrote:
> > > >> Previously, MIPS is using self-defined "globalnumber" in struct
> > > >> mips_cpuinfo to store topology information. However, it's not
> > > >friendly
> > > >> to DeviceTree based systems and lack of cpu_capacity related
> > > >> feature which can take advantage of multi-cluster system.
> > > >>
> > > >> Here, we enabled arch_topology for MIPS and adapted some
> > > >> functions to fit arch_topology structure.
> > > >> Also, we implmented smp_store_cpu_info to probe CPU's topology
> > > >information
> > > >> by "globalnumber" registers in VP ASE or Ebase.CPUNum for legacy
> > > >>
> > > >systems.
> > > >>
> > > >> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > > >> ---
> > > >>  arch/mips/Kconfig                |  1 +
> > > >>  arch/mips/include/asm/cpu-info.h | 49
> > > >> ---------------------------- arch/mips/include/asm/smp.h      |
> > > >> 2 -- arch/mips/include/asm/topology.h | 48
> > > >> +++++++++++++++++++++++++--- arch/mips/kernel/cpu-probe.c     |
> > > >> 43 ------------------------- arch/mips/kernel/setup.c         |
> > > >> 1 + arch/mips/kernel/smp.c           | 55
> > > >++++----------------------------
> > > >>  arch/mips/kernel/topology.c      | 42 ++++++++++++++++++++++++
> > > >>  8 files changed, 93 insertions(+), 148 deletions(-)
> > > >>
> > > >
> > > >[...]
> > > >
> > > >> diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
> > > >> index 8a418783a6bb..b9fefc5dc702 100644
> > > >> --- a/arch/mips/kernel/setup.c
> > > >> +++ b/arch/mips/kernel/setup.c
> > > >> @@ -784,6 +784,7 @@ void __init setup_arch(char **cmdline_p)
> > > >>  	dmi_setup();
> > > >>
> > > >>  	resource_init();
> > > >> +	init_cpu_topology();
> > > >>  	plat_smp_setup();
> > > >>
> > > >
> > > >Continuing my reply on previous patch, I see possible_cpu_mask
> > > >being set up in plat_smp_setup. Why not reverse the order above.
> > > >Further I see
> > > >that the logical->physical CPU mapping is done in plat_smp_setup
> > > >which is required to store/save any topology information.
> > >
> > > Some plat_smp_setup is touching topology so we must reset before
> > > that.
> >
> > Can you elaborate on this ? What gets overwritten if
> > init_cpu_topology is called after plat_smp_setup. I don't see any
> > plat_smp_setup setting up sibling masks.
>
> See arch/mips/kernel/smp-cps.c,
> in cps_smp_setup function, it is setting "cpu_data[nvpes + v].core",
> "cpu_data[nvpes + v].vpe_id", which is actually sibling thread_id and
> core_id after my patch.
>

Sorry, I still don't understand how these relate to cpu_topology in
arch_topology.c

--
Regards,
Sudeep

  reply	other threads:[~2020-04-09 12:53 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-08 11:34 [PATCH 00/12] MIPS: Topology & DeviceTree CPU rework Jiaxun Yang
2020-04-08 11:34 ` [PATCH 01/12] MIPS: setup: Drop prefill_possible_map Jiaxun Yang
2020-04-08 11:34 ` [PATCH 02/12] MIPS: prom: Add helper to parse CPU node in dt Jiaxun Yang
2020-04-08 11:34 ` [PATCH 03/12] arch_topology: Make it avilable for MIPS Jiaxun Yang
2020-04-08 18:23   ` Valentin Schneider
2020-04-09  0:54   ` kbuild test robot
2020-04-09 10:13   ` Sudeep Holla
2020-04-08 11:34 ` [PATCH 04/12] arch_topology: Reset all cpus in reset_cpu_topology Jiaxun Yang
2020-04-08 18:23   ` Valentin Schneider
2020-04-09 10:19   ` Sudeep Holla
2020-04-08 11:34 ` [PATCH 05/12] MIPS: Switch to arch_topology Jiaxun Yang
2020-04-08 23:36   ` kbuild test robot
2020-04-09 10:31   ` Sudeep Holla
     [not found]     ` <C2794910-48A0-4472-953A-13F40BA39423@flygoat.com>
2020-04-09 10:58       ` Sudeep Holla
2020-04-09 11:07         ` Jiaxun Yang
2020-04-09 12:53           ` Sudeep Holla [this message]
2020-04-09 13:14             ` Jiaxun Yang
2020-04-09 12:23         ` Jiaxun Yang
2020-04-08 12:59 ` [PATCH 06/12] MIPS: Kernel: Switch to new topology interface Jiaxun Yang
2020-04-08 12:59 ` [PATCH 07/12] MIPS: CPS & MT: " Jiaxun Yang
2020-04-08 12:59 ` [PATCH 08/12] irqchip: mips-cpu: " Jiaxun Yang
2020-04-08 12:59 ` [PATCH 09/12] MIPS: bmips: " Jiaxun Yang
2020-04-08 12:59 ` [PATCH 10/12] MIPS: nlm: " Jiaxun Yang
2020-04-08 12:59 ` [PATCH 11/12] MIPS: Loongson64: " Jiaxun Yang
2020-04-08 12:59 ` [PATCH 12/12] MIPS: ip27: Fix includes Jiaxun Yang
2020-04-09  9:19   ` Mike Rapoport
2020-04-09  9:38     ` Jiaxun Yang
2020-04-09 10:07       ` Mike Rapoport

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