From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: John Garry <john.garry@huawei.com>
Cc: Arnd Bergmann <arnd@arndb.de>,
Bjorn Helgaas <bhelgaas@google.com>, <linux-mips@vger.kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Huacai Chen <chenhc@lemote.com>,
Paul Burton <paulburton@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Stephen Kitt <steve@sk2.org>,
Nick Desaulniers <ndesaulniers@google.com>,
Serge Semin <fancer.lancer@gmail.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Andrew Morton <akpm@linux-foundation.org>,
Daniel Silsby <dansilsby@gmail.com>,
Mike Rapoport <rppt@linux.ibm.com>,
Paul Cercueil <paul@crapouillou.net>,
Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Allison Randal <allison@lohutok.net>,
Tiezhu Yang <yangtiezhu@loongson.cn>,
Wei Xu <xuwei5@hisilicon.com>, <linux-kernel@vger.kernel.org>,
Linuxarm <linuxarm@huawei.com>, Rob Herring <robh@kernel.org>,
linux-arch <linux-arch@vger.kernel.org>
Subject: Re: [PATCH 3/4] lib: logic_pio: Introduce MMIO_LOWER_RESERVED
Date: Mon, 27 Apr 2020 20:21:29 +0800 [thread overview]
Message-ID: <20200427202129.34f8807e@flygoat-x1e> (raw)
In-Reply-To: <e6e3331f-283d-03e8-b23e-41870b547e34@huawei.com>
On Mon, 27 Apr 2020 12:54:06 +0100
John Garry <john.garry@huawei.com> wrote:
> On 27/04/2020 12:03, Jiaxun Yang wrote:
> >
> >
> > 于 2020年4月27日 GMT+08:00 下午6:43:09, John Garry
> > <john.garry@huawei.com> 写到:
> >> On 26/04/2020 12:47, Jiaxun Yang wrote:
> >>> That would allow platforms reserve some lower address in PIO MMIO
> >>> range to deal with legacy drivers with hardcoded I/O ports that
> >>> can't be managed by logic_pio.
> >>
> >> Hi,
> >>
> >> Is there some reason why the logic_pio code cannot be improved to
> >> handle these devices at these "fixed" addresses? Or do you have a
> >> plan to improve it? We already support fixed bus address devices
> >> in the INDIRECT IO region.
> >
> > Hi,
> >
> > The issue about "Fixed Address" is we can't control the ioport
> > That driver used to operate devices.
> > So any attempt to resolve it in logic_pio seems impossible.
> >
> > Currently we have i8259, i8042, piix4_smbus, mc146818 rely on this
> > assumption.
>
> Right, and from glancing at a couple of drivers you mentioned, if we
> were to register a logic pio region for that legacy region, there
> does not seem to be an easy place to fixup to use logic pio addresses
> (for those devices). They use hardcoded values. However if all those
> drivers were mips specific, you could fixup those drivers to use
> logic_pio addresses today through some macro. But not sure on that.
>
Well, most of these drivers are shared with x86 so....
I guess the conversion needs two or more release cycles.
>
> So, going back to your change, I have a dilemma wondering whether you
> should still register a logic pio region for the legacy region
> instead of the carveout reservation, but ensure it is the first
> region registered, such that logic pio address base is 0 and no
> translation is required. At least then you have a region registered
> and it shows in /proc/ioports, but then this whole thing becomes a
> bit fragile.
Thanks for your solution. So I must register this range as early as
possible. As IRQ is the first subsystem using ISA, I'll do it before
IRQ init, just at the place I setup iormap for reserved region now.
Should be early enough to avoid any collision, as the only logic_pio
user on our system is PCI controller.
Thanks.
>
--
Jiaxun Yang
next prev parent reply other threads:[~2020-04-27 12:21 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-26 11:47 [PATCH 0/4] MIPS: Loongson64: Use logic_pio Jiaxun Yang
2020-04-26 11:47 ` [PATCH 1/4] MIPS: Massage address spaces headers Jiaxun Yang
2020-04-26 11:47 ` [PATCH 2/4] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-04-26 11:47 ` [PATCH 3/4] lib: logic_pio: Introduce MMIO_LOWER_RESERVED Jiaxun Yang
2020-04-27 10:43 ` John Garry
2020-04-27 11:03 ` Jiaxun Yang
2020-04-27 11:54 ` John Garry
2020-04-27 12:21 ` Jiaxun Yang [this message]
2020-04-26 11:47 ` [PATCH 4/4] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2020-04-30 0:57 ` [PATCH v3 1/3] MIPS: Move VMALLOC_START into spaces.h Jiaxun Yang
2020-04-30 0:57 ` [PATCH v3 2/3] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-04-30 0:57 ` [PATCH v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2020-05-08 11:44 ` [PATCH RESEND v3 1/3] MIPS: Move VMALLOC_START into spaces.h Jiaxun Yang
2020-05-08 11:44 ` [PATCH RESEND v3 2/3] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-05-08 16:11 ` Thomas Bogendoerfer
2020-05-08 16:22 ` Jiaxun Yang
2020-05-08 16:52 ` Thomas Bogendoerfer
2020-05-08 17:09 ` Jiaxun Yang
2020-05-14 14:21 ` Thomas Bogendoerfer
2020-05-14 14:56 ` Jiaxun Yang
2020-05-14 13:20 ` Jiaxun Yang
2020-05-08 11:44 ` [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2021-01-13 18:02 ` logical PIO code for mips question (was Re: [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP) John Garry
2021-01-14 0:13 ` Jiaxun Yang
2021-01-14 9:18 ` John Garry
2021-01-14 11:10 ` Jiaxun Yang
2021-01-14 11:20 ` John Garry
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