From: WANG Xuerui <git@xen0n.name>
To: linux-mips@vger.kernel.org
Cc: WANG Xuerui <git@xen0n.name>, Huacai Chen <chenhc@lemote.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH 1/4] MIPS: Loongson64: fix typos in loongson_regs.h
Date: Sat, 2 May 2020 21:38:43 +0800 [thread overview]
Message-ID: <20200502133846.40590-2-git@xen0n.name> (raw)
In-Reply-To: <20200502133846.40590-1-git@xen0n.name>
Fix some symbol names to align with Loongson's User Manual wording. Also
correct the comment in csr_readq() suggesting the wrong instruction in
use.
Fixes: 6a6f9b7dafd50efc ("MIPS: Loongson: Add CFUCFG&CSR support")
Signed-off-by: WANG Xuerui <git@xen0n.name>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
arch/mips/include/asm/mach-loongson64/loongson_regs.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/mips/include/asm/mach-loongson64/loongson_regs.h b/arch/mips/include/asm/mach-loongson64/loongson_regs.h
index 363a47a5d26e..3fa94c6ec3b9 100644
--- a/arch/mips/include/asm/mach-loongson64/loongson_regs.h
+++ b/arch/mips/include/asm/mach-loongson64/loongson_regs.h
@@ -77,12 +77,12 @@ static inline u32 read_cpucfg(u32 reg)
#define LOONGSON_CFG2_LBT3 BIT(6)
#define LOONGSON_CFG2_LBTMMU BIT(7)
#define LOONGSON_CFG2_LPMP BIT(8)
-#define LOONGSON_CFG2_LPMPREV GENMASK(11, 9)
+#define LOONGSON_CFG2_LPMREV GENMASK(11, 9)
#define LOONGSON_CFG2_LAMO BIT(12)
#define LOONGSON_CFG2_LPIXU BIT(13)
#define LOONGSON_CFG2_LPIXUN BIT(14)
-#define LOONGSON_CFG2_LZVP BIT(15)
-#define LOONGSON_CFG2_LZVREV GENMASK(18, 16)
+#define LOONGSON_CFG2_LVZP BIT(15)
+#define LOONGSON_CFG2_LVZREV GENMASK(18, 16)
#define LOONGSON_CFG2_LGFTP BIT(19)
#define LOONGSON_CFG2_LGFTPREV GENMASK(22, 20)
#define LOONGSON_CFG2_LLFTP BIT(23)
@@ -139,7 +139,7 @@ static inline u64 csr_readq(u32 reg)
{
u64 __res;
- /* DWRCSR reg, val */
+ /* DRDCSR reg, val */
__asm__ __volatile__(
"parse_r __res,%0\n\t"
"parse_r reg,%1\n\t"
--
2.21.0
next prev parent reply other threads:[~2020-05-02 13:46 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-02 13:38 [PATCH 0/4] CPUCFG emulation on older Loongson64 cores WANG Xuerui
2020-05-02 13:38 ` WANG Xuerui [this message]
2020-05-02 13:38 ` [PATCH 2/4] MIPS: Loongson64: define offsets and known revisions for some CPUCFG features WANG Xuerui
2020-05-02 13:38 ` [PATCH 3/4] MIPS: define more Loongson CP0.Config6 and CP0.Diag feature bits WANG Xuerui
2020-05-02 13:38 ` [PATCH 4/4] MIPS: emulate CPUCFG instruction on older Loongson64 cores WANG Xuerui
2020-05-02 13:59 ` Jiaxun Yang
2020-05-03 6:31 ` Huacai Chen
2020-05-03 7:58 ` Wang Xuerui
2020-05-03 8:25 ` Jiaxun Yang
2020-05-03 10:33 ` [PATCH v2 0/4] CPUCFG emulation " WANG Xuerui
2020-05-16 11:29 ` WANG Xuerui
2020-05-17 8:38 ` Thomas Bogendoerfer
2020-05-03 10:33 ` [PATCH v2 1/4] MIPS: Loongson64: fix typos in loongson_regs.h WANG Xuerui
2020-05-03 10:33 ` [PATCH v2 2/4] MIPS: Loongson64: define offsets and known revisions for some CPUCFG features WANG Xuerui
2020-05-03 10:33 ` [PATCH v2 3/4] MIPS: define more Loongson CP0.Config6 and CP0.Diag feature bits WANG Xuerui
2020-05-03 10:33 ` [PATCH v2 4/4] MIPS: emulate CPUCFG instruction on older Loongson64 cores WANG Xuerui
2020-05-03 10:50 ` [PATCH v2 RESEND " WANG Xuerui
2020-05-03 15:50 ` Jiaxun Yang
2020-05-04 5:25 ` WANG Xuerui
2020-05-04 6:58 ` Jiaxun Yang
2020-05-17 8:37 ` Thomas Bogendoerfer
2020-05-17 11:39 ` WANG Xuerui
2020-05-17 15:17 ` Thomas Bogendoerfer
2020-05-18 2:44 ` WANG Xuerui
2020-05-19 14:33 ` WANG Xuerui
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