From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1FD0C433DF for ; Thu, 21 May 2020 11:47:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C085B20873 for ; Thu, 21 May 2020 11:47:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729134AbgEULrs (ORCPT ); Thu, 21 May 2020 07:47:48 -0400 Received: from mail.baikalelectronics.com ([87.245.175.226]:37058 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729077AbgEULrr (ORCPT ); Thu, 21 May 2020 07:47:47 -0400 Received: from localhost (unknown [127.0.0.1]) by mail.baikalelectronics.ru (Postfix) with ESMTP id 3D2D4803087B; Thu, 21 May 2020 11:47:39 +0000 (UTC) X-Virus-Scanned: amavisd-new at baikalelectronics.ru Received: from mail.baikalelectronics.ru ([127.0.0.1]) by localhost (mail.baikalelectronics.ru [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jNgJJc_VL4Gx; Thu, 21 May 2020 14:47:38 +0300 (MSK) Date: Thu, 21 May 2020 14:47:36 +0300 From: Serge Semin To: Feng Tang CC: Serge Semin , Mark Brown , Grant Likely , Vinod Koul , Alan Cox , Linus Walleij , Georgy Vlasov , Ramil Zaripov , Alexey Malahov , Thomas Bogendoerfer , Paul Burton , Ralf Baechle , Arnd Bergmann , Andy Shevchenko , Rob Herring , , , Jarkko Nikula , Thomas Gleixner , Wan Ahmad Zainie , Linus Walleij , Clement Leger , , Subject: Re: [PATCH v3 01/16] spi: dw: Add Tx/Rx finish wait methods to the MID DMA Message-ID: <20200521114736.b2azyfvym372vkdl@mobilestation> References: <20200521012206.14472-1-Sergey.Semin@baikalelectronics.ru> <20200521012206.14472-2-Sergey.Semin@baikalelectronics.ru> <20200521030924.GA12568@shbuild999.sh.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20200521030924.GA12568@shbuild999.sh.intel.com> X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Hello Feng, On Thu, May 21, 2020 at 11:09:24AM +0800, Feng Tang wrote: > Hi Serge, > > On Thu, May 21, 2020 at 04:21:51AM +0300, Serge Semin wrote: [nip] > > /* > > * dws->dma_chan_busy is set before the dma transfer starts, callback for rx > > * channel will clear a corresponding bit. > > @@ -200,6 +267,8 @@ static void dw_spi_dma_rx_done(void *arg) > > { > > struct dw_spi *dws = arg; > > > > + dw_spi_dma_wait_rx_done(dws); > > I can understand the problem about TX, but I don't see how RX > will get hurt, can you elaborate more? thanks > > - Feng Your question is correct. You are right with your hypothesis. Ideally upon the dw_spi_dma_rx_done() execution Rx FIFO must be already empty. That's why the commit log signifies the error being mostly related with Tx FIFO. But practically there are many reasons why Rx FIFO might be left with data: DMA engine failures, incorrect DMA configuration (if DW SPI or DW DMA driver messed something up), controller hanging up, and so on. It's better to catch an error at this stage while propagating it up to the SPI device drivers. Especially seeing the wait-check implementation doesn't gives us much of the execution overhead in normal conditions. So by calling dw_spi_dma_wait_rx_done() we make sure that all the data has been fetched and we may freely get the buffers back to the client driver. -Sergey