From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63FC4C433E0 for ; Fri, 22 May 2020 11:13:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3FBD920723 for ; Fri, 22 May 2020 11:13:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728672AbgEVLNq (ORCPT ); Fri, 22 May 2020 07:13:46 -0400 Received: from mga18.intel.com ([134.134.136.126]:35945 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728657AbgEVLNp (ORCPT ); Fri, 22 May 2020 07:13:45 -0400 IronPort-SDR: 5nZ6cGtJpu/BqelmJBVFY6bt9IHwuHcrWXWe1b4R4/q5eYWaJ+ll01tsjkT64o/6KfTGJeCoUJ EA2hc9+FpRNA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 May 2020 04:13:43 -0700 IronPort-SDR: YuqBZU0ak8gcKa2K2aEEyKTccCzb7sOYyacUb1SqLSzh8LYIUXnWK4lETim8E4sIZVi9AL7hlA RTx0hq4s9PVw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,421,1583222400"; d="scan'208";a="467149192" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by fmsmga005.fm.intel.com with ESMTP; 22 May 2020 04:13:38 -0700 Received: from andy by smile with local (Exim 4.93) (envelope-from ) id 1jc5cS-008Dbm-I2; Fri, 22 May 2020 14:13:40 +0300 Date: Fri, 22 May 2020 14:13:40 +0300 From: Andy Shevchenko To: Serge Semin Cc: Mark Brown , Linus Walleij , Vinod Koul , Feng Tang , Grant Likely , Alan Cox , Serge Semin , Georgy Vlasov , Ramil Zaripov , Alexey Malahov , Thomas Bogendoerfer , Paul Burton , Ralf Baechle , Arnd Bergmann , Rob Herring , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, Wan Ahmad Zainie , Thomas Gleixner , Jarkko Nikula , "wuxu.wu" , Clement Leger , Linus Walleij , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 01/16] spi: dw: Add Tx/Rx finish wait methods to the MID DMA Message-ID: <20200522111340.GX1634618@smile.fi.intel.com> References: <20200522000806.7381-1-Sergey.Semin@baikalelectronics.ru> <20200522000806.7381-2-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200522000806.7381-2-Sergey.Semin@baikalelectronics.ru> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On Fri, May 22, 2020 at 03:07:50AM +0300, Serge Semin wrote: > Since DMA transfers are performed asynchronously with actual SPI > transaction, then even if DMA transfers are finished it doesn't mean > all data is actually pushed to the SPI bus. Some data might still be > in the controller FIFO. This is specifically true for Tx-only > transfers. In this case if the next SPI transfer is recharged while > a tail of the previous one is still in FIFO, we'll loose that tail > data. In order to fix this lets add the wait procedure of the Tx/Rx > SPI transfers completion after the corresponding DMA transactions > are finished. ... > Fixes: 7063c0d942a1 ("spi/dw_spi: add DMA support") Usually we put this before any other tags. > Cc: Ramil Zaripov > Cc: Alexey Malahov > Cc: Thomas Bogendoerfer > Cc: Paul Burton > Cc: Ralf Baechle > Cc: Arnd Bergmann > Cc: Andy Shevchenko > Cc: Rob Herring Are you sure Rob needs this to see? You really need to shrink Cc lists of the patches to send them on common sense basis. > Cc: linux-mips@vger.kernel.org > Cc: devicetree@vger.kernel.org Ditto. ... > Changelog v4: > - Get back ndelay() method to wait for an SPI transfer completion. > spi_delay_exec() isn't suitable for the atomic context. OTOH we may teach spi_delay_exec() to perform atomic sleeps. ... > + while (dw_spi_dma_tx_busy(dws) && retry--) > + ndelay(ns); I might be mistaken, but I think I told that this one misses to keep power management in mind. Have you read Documentation/process/volatile-considered-harmful.rst ? ... > + while (dw_spi_dma_rx_busy(dws) && retry--) > + ndelay(ns); Ditto. -- With Best Regards, Andy Shevchenko