* [PATCH] MIPS: Loongson64: Adjust IRQ layout
@ 2020-07-06 10:21 Huacai Chen
2020-07-08 9:37 ` Thomas Bogendoerfer
0 siblings, 1 reply; 2+ messages in thread
From: Huacai Chen @ 2020-07-06 10:21 UTC (permalink / raw)
To: Thomas Bogendoerfer
Cc: linux-mips, Fuxin Zhang, Zhangjin Wu, Huacai Chen, Jiaxun Yang,
Huacai Chen
Adjust IRQ layout in order to use IRQ resources more efficiently, which
is done by adjusting NR_IRQS and MIPS_CPU_IRQ_BASE.
Before this patch:
0~15: ISA/LPC IRQs;
16~55: Dynamic IRQs;
56~63: MIPS CPU IRQs;
64~127: PCH IRQs;
128~255: Dynamic IRQs.
After this patch:
0~15: ISA/LPC IRQs;
16~23: MIPS CPU IRQs;
24~87: PCH IRQs;
88~280: Dynamic IRQs.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
arch/mips/include/asm/mach-loongson64/irq.h | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/mach-loongson64/irq.h b/arch/mips/include/asm/mach-loongson64/irq.h
index d41dc4a..f5e362f7 100644
--- a/arch/mips/include/asm/mach-loongson64/irq.h
+++ b/arch/mips/include/asm/mach-loongson64/irq.h
@@ -5,7 +5,11 @@
#include <boot_param.h>
/* cpu core interrupt numbers */
-#define MIPS_CPU_IRQ_BASE 56
+#define NR_IRQS_LEGACY 16
+#define NR_MIPS_CPU_IRQS 8
+#define NR_IRQS (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + 256)
+
+#define MIPS_CPU_IRQ_BASE NR_IRQS_LEGACY
#include <asm/mach-generic/irq.h>
--
2.7.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] MIPS: Loongson64: Adjust IRQ layout
2020-07-06 10:21 [PATCH] MIPS: Loongson64: Adjust IRQ layout Huacai Chen
@ 2020-07-08 9:37 ` Thomas Bogendoerfer
0 siblings, 0 replies; 2+ messages in thread
From: Thomas Bogendoerfer @ 2020-07-08 9:37 UTC (permalink / raw)
To: Huacai Chen
Cc: linux-mips, Fuxin Zhang, Zhangjin Wu, Huacai Chen, Jiaxun Yang
On Mon, Jul 06, 2020 at 06:21:56PM +0800, Huacai Chen wrote:
> Adjust IRQ layout in order to use IRQ resources more efficiently, which
> is done by adjusting NR_IRQS and MIPS_CPU_IRQ_BASE.
>
> Before this patch:
> 0~15: ISA/LPC IRQs;
> 16~55: Dynamic IRQs;
> 56~63: MIPS CPU IRQs;
> 64~127: PCH IRQs;
> 128~255: Dynamic IRQs.
>
> After this patch:
> 0~15: ISA/LPC IRQs;
> 16~23: MIPS CPU IRQs;
> 24~87: PCH IRQs;
> 88~280: Dynamic IRQs.
>
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
> arch/mips/include/asm/mach-loongson64/irq.h | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
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2020-07-06 10:21 [PATCH] MIPS: Loongson64: Adjust IRQ layout Huacai Chen
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