From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Huacai Chen <chenhc@lemote.com>,
"open list:MIPS" <linux-mips@vger.kernel.org>,
Fuxin Zhang <zhangfx@lemote.com>,
Zhangjin Wu <wuzhangjin@gmail.com>
Subject: Re: [PATCH V3 1/2] MIPS: Loongson-3: Enable COP2 usage in kernel
Date: Fri, 7 Aug 2020 15:36:06 +0200 [thread overview]
Message-ID: <20200807133606.GA12704@alpha.franken.de> (raw)
In-Reply-To: <410cf75c-4cf5-94d8-fbc9-821d38f8a299@flygoat.com>
On Fri, Aug 07, 2020 at 09:25:25PM +0800, Jiaxun Yang wrote:
>
>
> 在 2020/8/7 21:13, Thomas Bogendoerfer 写道:
> >On Wed, Aug 05, 2020 at 09:51:44PM +0800, Jiaxun Yang wrote:
> >>>yes there is. Since this COP2 is a total black box to me, it would be
> >>>really helpfull to get some docs for it or at least some information what
> >>>it exactly does and how you want to use it in kernel code.
> >>FYI:
> >>Loongson doesn't have any CU2 register. It just reused LWC2 & LDC2 opcode
> >>to define some load & store instructions (e.g. 128bit load to two GPRs).
> >>
> >>I have a collection of these instructions here[1].
> >>
> >> From GS464E (3A2000+), execuating these instruction won't produce COP2
> >>unusable
> >>exception. But older Loongson cores (GS464) will still produce COP2
> >>exception, thus
> >>we should have CU2 enabled in kernel. That would allow us use to these
> >>instructions
> >>to optimize kernel.
> >thank you that makes things a little bit clearer.
> >
> >How will this be used in kernel code ? Special assembler routines or
> >by enabling gcc options ?
>
> Via special assembly routines, as -msoft-float will disable generation of
> these instructions in GCC.
>
> I knew Huacai have out-of-tree memcpy optimization and Xuerui have
> RAID5 optimiztion with these instructions.
>
> >
> >>>And finally what I stil don't like is the splittering of more
> >>>#ifdef LOONGSON into common code. I'd prefer a more generic way
> >>>to enable COPx for in kernel usage. Maybe a more generic config option
> >>>or a dynamic solution like the one for user land.
> >>Agreed. some Kconfig options or cpuinfo_mips.options can be helpful.
> >let's see whether this really is needed.
> >
> >To me it looks like the COP2 exception support for loongson makes
> >thing worse than it helps. How about the patch below ? There is still
> >a gap between starting the kernel and COP2 enabled for which I'm not
> >sure, if we are hitting COP2 instructions.
>
> Yes, the exception does not really make sense.
> What's your opinion Huacai?
>
> For in-kernel usage, we still have to enable it in genex.
you shouldn't need any other changes. ST0_CU2 will be set in
configure_status() and not touched after that.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2020-08-07 14:08 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-02 4:55 [PATCH V3 1/2] MIPS: Loongson-3: Enable COP2 usage in kernel Huacai Chen
2020-05-02 4:55 ` [PATCH V3 2/2] MIPS: Loongson-3: Calculate ra properly when unwinding the stack Huacai Chen
2020-05-06 5:29 ` [PATCH V3 1/2] MIPS: Loongson-3: Enable COP2 usage in kernel Jiaxun Yang
2020-08-01 7:59 ` Huacai Chen
2020-08-05 12:10 ` Thomas Bogendoerfer
2020-08-05 13:51 ` Jiaxun Yang
2020-08-06 1:15 ` Huacai Chen
2020-08-07 13:13 ` Thomas Bogendoerfer
2020-08-07 13:25 ` Jiaxun Yang
2020-08-07 13:36 ` Thomas Bogendoerfer [this message]
2020-08-09 14:53 ` Jiaxun Yang
2020-08-10 14:12 ` Thomas Bogendoerfer
2020-08-11 2:16 ` Jiaxun Yang
2020-08-11 6:45 ` Huacai Chen
2020-08-11 12:06 ` Thomas Bogendoerfer
2020-08-14 9:44 ` Huacai Chen
2020-08-14 13:16 ` Jiaxun Yang
2020-08-26 12:46 ` Thomas Bogendoerfer
2020-08-27 3:48 ` Huacai Chen
2020-08-28 8:42 ` Thomas Bogendoerfer
2020-08-28 9:21 ` Huacai Chen
2020-08-28 9:33 ` Thomas Bogendoerfer
2020-08-28 9:52 ` Huacai Chen
2020-08-28 11:12 ` Thomas Bogendoerfer
2020-09-02 6:54 ` Huacai Chen
2020-09-03 8:43 ` Thomas Bogendoerfer
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