Re: [PATCH v2] MIPS: KASLR: Avoid endless loop in sync_icache when synci_step is zero

[Thomas Bogendoerfer <tsbogend@alpha.franken.de>]

On Fri, Dec 04, 2020 at 09:11:46AM +0800, Jinyang He wrote:
> Avoid endless loop if synci_step was zero read by rdhwr instruction.
> 
> Most platforms do not need to do synci instruction operations when
> synci_step is 0. But for example, the synci implementation on Loongson64
> platform has some changes. On the one hand, it ensures that the memory
> access instructions have been completed. On the other hand, it guarantees
> that all prefetch instructions need to be fetched again. And its address
> information is useless. Thus, only one synci operation is required when
> synci_step is 0 on Loongson64 platform. I guess that some other platforms
> have similar implementations on synci, so add judgment conditions in
> `while` to ensure that at least all platforms perform synci operations
> once. For those platforms that do not need synci, they just do one more
> operation similar to nop.
> 
> Signed-off-by: Jinyang He <hejinyang@loongson.cn>
> ---
>  arch/mips/kernel/relocate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

applied to mips-next.

Thomas.

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