From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF558C433DB for ; Thu, 7 Jan 2021 17:48:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ADFFA233FD for ; Thu, 7 Jan 2021 17:48:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729041AbhAGRsC (ORCPT ); Thu, 7 Jan 2021 12:48:02 -0500 Received: from elvis.franken.de ([193.175.24.41]:34891 "EHLO elvis.franken.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728889AbhAGRsC (ORCPT ); Thu, 7 Jan 2021 12:48:02 -0500 Received: from uucp (helo=alpha) by elvis.franken.de with local-bsmtp (Exim 3.36 #1) id 1kxZNW-00015D-00; Thu, 07 Jan 2021 18:47:18 +0100 Received: by alpha.franken.de (Postfix, from userid 1000) id 49471C081B; Thu, 7 Jan 2021 18:26:20 +0100 (CET) Date: Thu, 7 Jan 2021 18:26:20 +0100 From: Thomas Bogendoerfer To: Huacai Chen Cc: Jinyang He , Eric Biederman , Dave Young , Baoquan He , Vivek Goyal , "open list:MIPS" , kexec@lists.infradead.org, Jiaxun Yang , Youling Tang Subject: Re: [PATCH V3] MIPS: Loongson64: Add kexec/kdump support Message-ID: <20210107172620.GA13201@alpha.franken.de> References: <20201221120220.3186744-1-chenhuacai@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On Thu, Dec 31, 2020 at 09:23:33AM +0800, Huacai Chen wrote: > > Thanks, :-) > > Jinyang > Any comments? sure... > > > --- a/arch/mips/kernel/relocate_kernel.S > > > +++ b/arch/mips/kernel/relocate_kernel.S > > > @@ -6,6 +6,7 @@ > > > > > > #include > > > #include > > > +#include > > > #include > > > #include > > > #include > > > @@ -133,6 +134,33 @@ LEAF(kexec_smp_wait) > > > #else > > > sync > > > #endif > > > + > > > +#ifdef CONFIG_CPU_LOONGSON64 Is there a reason why you can't use the already existing infrastructure the way cavium-octeon is doing it ? If you can't please explain why so we can find a way to extend it. But having some sort of poking loongson registers in generic MIPS code is a non starter. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]