From: Stijn Tintel <stijn@linux-ipv6.be>
To: linux-mips@vger.kernel.org
Cc: tsbogend@alpha.franken.de, rdunlap@infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] MIPS: Octeon: fix CN6640 hang on XAUI init
Date: Sun, 3 Apr 2022 05:59:49 +0300 [thread overview]
Message-ID: <20220403025950.837085-1-stijn@linux-ipv6.be> (raw)
Some CN66XX series Octeon II chips seem to hang if a reset is issued on
XAUI initialization. Avoid the hang by disabling the reset.
Tested on SNIC10E.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
---
arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c b/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c
index fea71a85bb29..a92632223497 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c
@@ -156,8 +156,9 @@ int __cvmx_helper_xaui_enable(int interface)
xauiCtl.u64 = cvmx_read_csr(CVMX_PCSXX_CONTROL1_REG(interface));
xauiCtl.s.lo_pwr = 0;
- /* Issuing a reset here seems to hang some CN68XX chips. */
- if (!OCTEON_IS_MODEL(OCTEON_CN68XX_PASS1_X) &&
+ /* Issuing a reset here seems to hang some CN66XX/CN68XX chips. */
+ if (!OCTEON_IS_MODEL(OCTEON_CN66XX) &&
+ !OCTEON_IS_MODEL(OCTEON_CN68XX_PASS1_X) &&
!OCTEON_IS_MODEL(OCTEON_CN68XX_PASS2_X))
xauiCtl.s.reset = 1;
--
2.35.1
next reply other threads:[~2022-04-03 3:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-03 2:59 Stijn Tintel [this message]
2022-04-03 2:59 ` [PATCH 2/2] MIPS: Octeon: support all interfaces on CN66XX Stijn Tintel
2022-04-26 14:30 ` Thomas Bogendoerfer
2022-04-26 14:30 ` [PATCH 1/2] MIPS: Octeon: fix CN6640 hang on XAUI init Thomas Bogendoerfer
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