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From: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
To: paul@crapouillou.net, paulburton@kernel.org,
	tsbogend@alpha.franken.de, mturquette@baylibre.com,
	sboyd@kernel.org
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: [RESEND PATCH 3/3] mips: ingenic: Do not manually reference the CPU clock
Date: Mon, 11 Apr 2022 11:14:41 +0100	[thread overview]
Message-ID: <20220411101441.17020-4-aidanmacdonald.0x0@gmail.com> (raw)
In-Reply-To: <20220411101441.17020-1-aidanmacdonald.0x0@gmail.com>

It isn't necessary to manually walk the device tree and enable
the CPU clock anymore. The CPU and other necessary clocks are
now flagged as critical in the clock driver, which accomplishes
the same thing in a more declarative fashion.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/generic/board-ingenic.c | 26 --------------------------
 1 file changed, 26 deletions(-)

diff --git a/arch/mips/generic/board-ingenic.c b/arch/mips/generic/board-ingenic.c
index 3f44f14bdb33..c422bbc890ed 100644
--- a/arch/mips/generic/board-ingenic.c
+++ b/arch/mips/generic/board-ingenic.c
@@ -131,36 +131,10 @@ static const struct platform_suspend_ops ingenic_pm_ops __maybe_unused = {
 
 static int __init ingenic_pm_init(void)
 {
-	struct device_node *cpu_node;
-	struct clk *cpu0_clk;
-	int ret;
-
 	if (boot_cpu_type() == CPU_XBURST) {
 		if (IS_ENABLED(CONFIG_PM_SLEEP))
 			suspend_set_ops(&ingenic_pm_ops);
 		_machine_halt = ingenic_halt;
-
-		/*
-		 * Unconditionally enable the clock for the first CPU.
-		 * This makes sure that the PLL that feeds the CPU won't be
-		 * stopped while the kernel is running.
-		 */
-		cpu_node = of_get_cpu_node(0, NULL);
-		if (!cpu_node) {
-			pr_err("Unable to get CPU node\n");
-		} else {
-			cpu0_clk = of_clk_get(cpu_node, 0);
-			if (IS_ERR(cpu0_clk)) {
-				pr_err("Unable to get CPU0 clock\n");
-				return PTR_ERR(cpu0_clk);
-			}
-
-			ret = clk_prepare_enable(cpu0_clk);
-			if (ret) {
-				pr_err("Unable to enable CPU0 clock\n");
-				return ret;
-			}
-		}
 	}
 
 	return 0;
-- 
2.35.1


      parent reply	other threads:[~2022-04-11 10:14 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-11 10:14 [RESEND PATCH 0/3] Clock fixes for Ingenic SoCs Aidan MacDonald
2022-04-11 10:14 ` [RESEND PATCH 1/3] clk: ingenic: Allow specifying common clock flags Aidan MacDonald
2022-04-11 10:14 ` [RESEND PATCH 2/3] clk: ingenic: Mark critical clocks in Ingenic SoCs Aidan MacDonald
2022-04-22  2:33   ` Stephen Boyd
2022-04-22 15:54     ` Aidan MacDonald
2022-04-11 10:14 ` Aidan MacDonald [this message]

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