From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64FC7C433F5 for ; Mon, 18 Apr 2022 07:10:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231476AbiDRHNV (ORCPT ); Mon, 18 Apr 2022 03:13:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230360AbiDRHNU (ORCPT ); Mon, 18 Apr 2022 03:13:20 -0400 Received: from elvis.franken.de (elvis.franken.de [193.175.24.41]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 098C6167E7; Mon, 18 Apr 2022 00:10:41 -0700 (PDT) Received: from uucp (helo=alpha) by elvis.franken.de with local-bsmtp (Exim 3.36 #1) id 1ngLWo-0008Ga-00; Mon, 18 Apr 2022 09:10:30 +0200 Received: by alpha.franken.de (Postfix, from userid 1000) id 7A686C0193; Mon, 18 Apr 2022 09:10:05 +0200 (CEST) Date: Mon, 18 Apr 2022 09:10:05 +0200 From: Thomas Bogendoerfer To: "Maciej W. Rozycki" Cc: "Jason A. Donenfeld" , LKML , Linux Crypto Mailing List , Thomas Gleixner , Arnd Bergmann , Theodore Ts'o , Dominik Brodowski , Russell King , Catalin Marinas , Will Deacon , Geert Uytterhoeven , Paul Walmsley , Palmer Dabbelt , Albert Ou , "David S . Miller" , Richard Weinberger , Anton Ivanov , Johannes Berg , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Chris Zankel , Max Filippov , John Stultz , Stephen Boyd , Dinh Nguyen , linux-arm-kernel , linux-m68k , "open list:BROADCOM NVRAM DRIVER" , linux-riscv , sparclinux@vger.kernel.org, linux-um@lists.infradead.org, X86 ML , linux-xtensa@linux-xtensa.org Subject: Re: [PATCH v4 04/11] mips: use fallback for random_get_entropy() instead of zero Message-ID: <20220418071005.GA4075@alpha.franken.de> References: <20220413115411.21489-1-Jason@zx2c4.com> <20220413115411.21489-5-Jason@zx2c4.com> <20220413122546.GA11860@alpha.franken.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On Fri, Apr 15, 2022 at 01:26:48PM +0100, Maciej W. Rozycki wrote: > Hi Jason, > > > > It depends on the exact system. Some have a 32-bit high-resolution > > > counter in the chipset (arch/mips/kernel/csrc-ioasic.c) giving like 25MHz > > > resolution, some have nothing but jiffies. > > > > Alright, so there _are_ machines with no c0 cycles but with a good > > clock. Yet, 25MHz is still less than the cpu cycle, so this c0 random > > ORing trick remains useful perhaps. > > It's not much less than the CPU cycle really, given that the R3k CPUs are > clocked at up to 40MHz in the systems concerned and likewise the buggy R4k > CPUs run at up to 60MHz (and mind that their CP0 Count register increments > at half the clock rate, so the rate is up to 30MHz anyway). The overhead > of the calculation is more than that, let alone the latency and issue rate > of an uncached MMIO access to the chipset register. > > Also the systems I have in mind and that lack a counter in the chipset > actually can make use of the buggy CP0 timer, because it's only when CP0 > timer interrupts are used that the erratum matters, but they use a DS1287 > RTC interrupt instead unconditionally as the clock event (see the comment > at the bottom of arch/mips/dec/time.c). But this has not been factored in > with `can_use_mips_counter' (should it just check for `mips_hpt_frequency' > being zero perhaps, meaning the timer interrupt not being used?). > > Thomas, do you happen to know if any of the SGI systems that we support > had buggy early R4k chips? IP22 has probably seen all buggy MIPS chips produced, so yes I even own Indy/Indigo2 CPU boards with early R4k chips. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]